An axiomatic basis for computer programming
Communications of the ACM
Introduction to Mathematical Theory of Computation
Introduction to Mathematical Theory of Computation
A Discipline of Programming
Digital Systems: Hardware Organization and Design
Digital Systems: Hardware Organization and Design
Verification of hardware designs thru symbolic manipulation
Proceedings of the Symposium on Design Automation and Microprocessors
A logic design structure for LSI testability
DAC '77 Proceedings of the 14th Design Automation Conference
A formal method for computer design verification
DAC '82 Proceedings of the 19th Design Automation Conference
Symbolic simulation for correct machine design
DAC '79 Proceedings of the 16th Design Automation Conference
The application of program verification techniques to hardware verification
DAC '79 Proceedings of the 16th Design Automation Conference
A programming language
Strum: Structured Microprogram Development System for Correct Firmware
IEEE Transactions on Computers
Logic synthesis through local transformations
IBM Journal of Research and Development
Boolean comparison of hardware and flowcharts
IBM Journal of Research and Development
Formal verification of a real-time hardware design
DAC '83 Proceedings of the 20th Design Automation Conference
| Hi-index | 14.98 |
This paper extends Floyd's inductive assertion method to formal verification of register transfer level (RTL) hardware descriptions. An RTL description with imbedded assertions about machine state will be the input to the verifier. The formal semantics of an RTL language for synchronous designs are defined, to make mechanical generation of verification conditions (VC's) possible. These VC's are to be fed to a theorem prover. Proof of all the VC's constitutes complete verification. The semantic rules define how time advances, in addition to how machine variables change. These rules make possible verification of real-time performance as well as logical correctness. Such real-time performance verification is important for some hardware designs. The paper also emphasizes the differences between software and hardware verification. An example is given to illustrate the formal verification method.