Proving Theorems about LISP Functions
Journal of the ACM (JACM)
Logic Design of Digital Systems
Logic Design of Digital Systems
Toward a man-machine system for proving program correctness
Toward a man-machine system for proving program correctness
Hardware verification.
Computer structures: Readings and examples (McGraw-Hill computer science series)
Computer structures: Readings and examples (McGraw-Hill computer science series)
Formal Verification of Fault Tolerance Using Theorem-Proving Techniques
IEEE Transactions on Computers
VVDS: a verification/diagnosis system for VHDL
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Symbolic simulation—techniques and applications
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
A new method for verifying sequential circuits
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Testing and Debugging Custom Integrated Circuits
ACM Computing Surveys (CSUR)
Validating PowerPC Microprocessor Custom Memories
IEEE Design & Test
Formal design verification of digital systems
DAC '83 Proceedings of the 20th Design Automation Conference
VLSI test expertise system using a control flow model
DAC '84 Proceedings of the 21st Design Automation Conference
A formal design verification system based on an automated reasoning system
DAC '84 Proceedings of the 21st Design Automation Conference
Symbolic simulation for functional verification with ADLIB and SDL
DAC '81 Proceedings of the 18th Design Automation Conference
Developments in verification of design correctness (A Tutorial)
DAC '80 Proceedings of the 17th Design Automation Conference
Defining and implementing a multilevel design representation with simulation applications
DAC '82 Proceedings of the 19th Design Automation Conference
A formal method for computer design verification
DAC '82 Proceedings of the 19th Design Automation Conference
Verification of synthesized circuits at register transfer level with flow graphs
EURO-DAC '91 Proceedings of the conference on European design automation
TheoSim: combining symbolic simulation and theorem proving for hardware verification
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
Verification of behavioral descriptions by combining symbolic simulation and automatic reasoning
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
An Inductive Assertion Method for Register Transfer Level Design Verification
IEEE Transactions on Computers
Functional test generation of digital LSI/VLSI systems using machine symbolic execution technique
ITC'84 Proceedings of the 1984 international test conference on The three faces of test: design, characterization, production
Combining several paradigms for circuit validation and verification
CASSIS'04 Proceedings of the 2004 international conference on Construction and Analysis of Safe, Secure, and Interoperable Smart Devices
Computing WCET using symbolic execution
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
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The growing complexity of machine designs and costs of engineering changes are increasing the demand for tools and methods to detect errors earlier in the hardware development cycle. Because of similar concerns in the development of software there has been a great deal of work on methods for proving that a program satisfies a given specification. This paper examines one such program verification technique, based on the notion of symbolic execution, and then explores its application to the problem of establishing the correct behavior of a piece of hardware.