Functional Description of Connector-Switch-Attenuator Networks
IEEE Transactions on Computers
Modular Decomposition of Combinatorial Multiple-Values Circuits
IEEE Transactions on Computers
Subcube Allocation in Hypercube Computers
IEEE Transactions on Computers
Absolute Minimization of Completely Specified Switching Functions
IEEE Transactions on Computers
An Automaton Model for Scheduling Constraints in Synchronous Machines
IEEE Transactions on Computers
Worst and Best Irredundant Sum-of-Products Expressions
IEEE Transactions on Computers
Logic Synthesis and Verification
Genetic engineering versus natural evolution: genetic algorithms with deterministic operators
Journal of Systems Architecture: the EUROMICRO Journal
Three Decades of HDLs: Part I, CDL Through TI-HDL
IEEE Design & Test
High-Speed Microprogrammable Asynchronous Controller Modules
IEEE Transactions on Computers
A Deterministic Built-In Self-Test Generator Based on Cellular Automata Structures
IEEE Transactions on Computers
ACM SIGARCH Computer Architecture News
Logic design automation of MOS combinational networks with fan-in, fan-out constraints
DAC '78 Proceedings of the 15th Design Automation Conference
The application of program verification techniques to hardware verification
DAC '79 Proceedings of the 16th Design Automation Conference
Computer hardware description languages and their applications
DAC '79 Proceedings of the 16th Design Automation Conference
Cubical CAMP for minimization of Boolean functions
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
A new synthesis technique for multilevel combinational circuits
EURO-DAC '90 Proceedings of the conference on European design automation
Fuzzy specification of finite state machines
EURO-DAC '90 Proceedings of the conference on European design automation
LSS: a system for production logic synthesis
IBM Journal of Research and Development
Transistor-Level Optimization of Supergates
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Unateness Properties of and-Exclusive-or Logic Circuits
IEEE Transactions on Computers
A Unified Theory of the Algebraic Topological Methods for the Synthesis of Switching Systems
IEEE Transactions on Computers
Global Flow Analysis in Automatic Logic Design
IEEE Transactions on Computers
Generic Fault Characterizations for Table Look-Up Coverage Bounding
IEEE Transactions on Computers
A Computer Algorithm for the Synthesis of Memoryless Logic Circuits
IEEE Transactions on Computers
Slide: An I/O Hardware Descriptive Language
IEEE Transactions on Computers
A Module-Level Testing Approach for Combinational Networks
IEEE Transactions on Computers
An Approach to Unified Methodology of Combinational Switching Circuits
IEEE Transactions on Computers
A New Technique for the Fast Minimization of Switching Functions
IEEE Transactions on Computers
Dynamic Testing of Redundant Logic Networks
IEEE Transactions on Computers
Combined Binary Code Translation and Parallel-to-Serial Conversion Using Stored Logic Arrays
IEEE Transactions on Computers
An Algebra for Switching Circuits
IEEE Transactions on Computers
Input Variable Assignment and Output Phase Optimization of PLA's
IEEE Transactions on Computers
Serial Interfaces for Minicomputers
IEEE Transactions on Computers
Computer-Aided Logic Design of Two-Level MOS Combinational Networks with Statistical Results
IEEE Transactions on Computers
Design of Testable Structures Defined by Simple Loops
IEEE Transactions on Computers
A Digital Synthesis Procedure Under Function Symmetries and Mapping Methods
IEEE Transactions on Computers
Optimum State Assignment for Synchronous Sequential Circuits
IEEE Transactions on Computers
A methodology for transistor-efficient supergate design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exact combinational logic synthesis and non-standard circuit design
Proceedings of the 5th conference on Computing frontiers
LSS: a system for production logic synthesis
IBM Journal of Research and Development
Logic synthesis through local transformations
IBM Journal of Research and Development
A logic programming framework for combinational circuit synthesis
ICLP'07 Proceedings of the 23rd international conference on Logic programming
Computer minimization of multivalued switching functions
IEEE Transactions on Computers
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