DAGON: technology binding and local optimization by DAG matching
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
MACDAS: multi-level AND-OR circuit synthesis using two-variable function generators
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
An Approach to Multilevel Boolean Minimization
Journal of the ACM (JACM)
Algebraic Automata Theory
Logic Design of Digital Systems
Logic Design of Digital Systems
Spectral Techniques in Digital Logic
Spectral Techniques in Digital Logic
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
New bounds for parallel prefix circuits
STOC '83 Proceedings of the fifteenth annual ACM symposium on Theory of computing
LSS: a system for production logic synthesis
IBM Journal of Research and Development
Finite Orthogonal Series in Design of Digital Devices
Finite Orthogonal Series in Design of Digital Devices
Synthesis and Optimization of Multilevel Logic under Timing Constraints
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A new decomposition method for multilevel circuit design
EURO-DAC '91 Proceedings of the conference on European design automation
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A conceptually simple method for multilevel synthesis of combinational functions is proposed. The method can take advantage of the availability of different gate types, including XOR, with the synthesis decisions being easily correlated to the topology of the circuit obtained. A function is synthesized using a cascade of mapping stages, which transform the function into one that is trivial to implement, called the goal function. The goal function---usually simple---is selected at the outset, then used to guide the definition of the transformations to be implemented by the mapping stages. The resulting circuits are well suited for CMOS implementations and are shown to be easily and/or robustly testable for stuck-open faults. Finally, from a sample of small functions, preliminary results indicate that the resulting circuits are of comparable size to those obtained by conventional minimization techniques. Further work is needed to compare these results to those of existing multilevel synthesis algorithms.