Spectral Techniques in Digital Logic

Spectral Signature Testing of Multiple Stuck-at Faults in Irredundant Combinational Networks

IEEE Transactions on Computers

Heuristic Minimization of MVL Functions: A Direct Cover Approach

IEEE Transactions on Computers

A unified view of test compression methods

IEEE Transactions on Computers

Testing programmable logic arrays by sum of syndromes

IEEE Transactions on Computers

A Spectral Lower Bound Technique for the Size of Decision Trees and Two-Level AND/OR Circuits

IEEE Transactions on Computers

Arithmetic Spectrum Applied to Fault Detection for Combinational Networks

IEEE Transactions on Computers

Generalized Transforms for Multiple Valued Circuits and Their Fault Detection

IEEE Transactions on Computers

Calculation of the Rademacher-Walsh spectrum from a reduced representation of Boolean functions

EURO-DAC '92 Proceedings of the conference on European design automation

Spectral transforms for large boolean functions with applications to technology mapping

DAC '93 Proceedings of the 30th international Design Automation Conference

Boolean matching of sequential elements

DAC '94 Proceedings of the 31st annual Design Automation Conference

Predicting the functional complexity of combinational circuits by symbolic spectral analysis of Boolean functions

EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation

Using BDDs to design ULMs for FPGAs

Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays

Synthesis by spectral translation using Boolean decision diagrams

DAC '96 Proceedings of the 33rd annual Design Automation Conference

A survey of Boolean matching techniques for library binding

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Forward and Inverse Transformations Between Haar Spectra and Ordered Binary Decision Diagrams of Boolean Functions

IEEE Transactions on Computers

Using Decision Diagrams to Design ULMs for FPGAs

IEEE Transactions on Computers

Spectral Analysis of Boolean Functions as a Graph Eigenvalue Problem

IEEE Transactions on Computers

Behavioral synthesis of combinational logic using spectral-based heuristics

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Decision Diagram Method for Calculation of Pruned Walsh Transform

IEEE Transactions on Computers

Spectral decision diagrams using graph transformations

Proceedings of the conference on Design, automation and test in Europe

Exact minimization of fixed polarity Reed-Muller expressions for incompletely specified functions

ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference

Computing walsh, arithmetic, and reed-muller spectral decision diagrams using graph transformations

Proceedings of the 12th ACM Great Lakes symposium on VLSI

Recursive Partitioning Technique for Combining Multiple Classifiers

Neural Processing Letters

A Unifying Approach to Edge-valued and Arithmetic Transform Decision Diagrams

Automation and Remote Control

Spectral Transforms for Large Boolean Functions withApplications to Technology Mapping

Formal Methods in System Design

Test-Pattern Generation Based on Reed-Muller Coefficients

IEEE Transactions on Computers

Classifier Instability and Partitioning

MCS '00 Proceedings of the First International Workshop on Multiple Classifier Systems

The Evaluation of Full Sensitivity for Test Generation in MVL Circuits

ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic

Novel Quantized Transform for Ternary Systems

ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic

A new synthesis technique for multilevel combinational circuits

EURO-DAC '90 Proceedings of the conference on European design automation

Design Verification by Test Vectors and Arithmetic Transform Universal Test Set

IEEE Transactions on Computers

Efficient computation of canonical form for Boolean matching in large libraries

Proceedings of the 2004 Asia and South Pacific Design Automation Conference

Building a better Boolean matcher and symmetry detector

Proceedings of the conference on Design, automation and test in Europe: Proceedings

Scaling and Better Approximating Quantum Fourier Transform by Higher Radices

IEEE Transactions on Computers

Haar wavelet based processor scheme for image coding with low circuit complexity

Computers and Electrical Engineering

Efficient Algorithm of Affine Form Searching forWeakly Specified Boolean Function

Fundamenta Informaticae

Functionally linear decomposition and synthesis of logic circuits for FPGAs

Proceedings of the 45th annual Design Automation Conference

A New Equivalence Relation of Logic Functions and Its Application in the Design of AND-OR-EXOR Networks

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Transforms of pseudo-Boolean random variables

Discrete Applied Mathematics

Spectral coefficients and classifier correlation

MCS'03 Proceedings of the 4th international conference on Multiple classifier systems

Optimization of imprecise circuits represented by Taylor series and real-valued polynomials

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

New considerations for spectral classification of boolean switching functions

VLSI Design

Novel universal threshold logic gate based on RTD and its application

Microelectronics Journal

Universal logic modules based on double-gate carbon nanotube transistors

Proceedings of the 48th Design Automation Conference

Efficient Algorithm of Affine Form Searching forWeakly Specified Boolean Function

Fundamenta Informaticae

Low training strength high capacity classifiers for accurate ensembles using walsh coefficients

SSPR'12/SPR'12 Proceedings of the 2012 Joint IAPR international conference on Structural, Syntactic, and Statistical Pattern Recognition

Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET)

Microelectronics Journal