System level fixed-point design based on an interpolative approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
A methodology and design environment for DSP ASIC fixed point refinement
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
Polynomial circuit models for component matching in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Spectral Techniques in Digital Logic
Spectral Techniques in Digital Logic
Specifying and verifying imprecise sequential datapaths by Arithmetic Transforms
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Accuracy Sensitive Word--Length Selection for Algorithm Optimization
ICCD '98 Proceedings of the International Conference on Computer Design
Automatic Evaluation of the Accuracy of Fixed-Point Algorithms
Proceedings of the conference on Design, automation and test in Europe
Automated fixed-point data-type optimization tool for signal processing and communication systems
Proceedings of the 41st annual Design Automation Conference
Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Optimizing Hardware Function Evaluation
IEEE Transactions on Computers
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation
IEEE Transactions on Computers
Optimization of polynomial datapaths using finite ring algebra
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimum wordlength search using sensitivity information
EURASIP Journal on Applied Signal Processing
Symbolic noise analysis approach to computational hardware optimization
Proceedings of the 45th annual Design Automation Conference
Proceedings of the 45th annual Design Automation Conference
A formal approach for debugging arithmetic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Finite precision bit-width allocation using SAT-modulo theory
Proceedings of the Conference on Design, Automation and Test in Europe
Simulation-based word-length optimization method for fixed-pointdigital signal processing systems
IEEE Transactions on Signal Processing
Combined word-length optimization and high-level synthesis of digital signal processing systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wordlength optimization for linear digital signal processing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Arithmetic transforms for compositions of sequential and imprecise datapaths
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Accuracy-Guaranteed Bit-Width Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fixed-point error analysis and word length optimization of 8×8 IDCT architectures
IEEE Transactions on Circuits and Systems for Video Technology
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Fault tolerant glucose sensor readout and recalibration
Proceedings of the 2nd Conference on Wireless Health
Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits
Proceedings of the International Conference on Computer-Aided Design
A scalable approach for automated precision analysis
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
A bit too precise? bounded verification of quantized digital filters
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Automating resource optimisation in reconfigurable design (abstract only)
Proceedings of the ACM/SIGDA international symposium on Field programmable gate arrays
Oversampled multi-phase time-domain bit-error rate processing for transmitter testing
Analog Integrated Circuits and Signal Processing
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Arithmetic circuits in general do not match specifications exactly, leading to different implementations within allowed imprecision. We present a technique to search for the least expensive fixed-point implementations for a given error bound. The method is practical in real applications and overcomes traditional precision analysis pessimism, as it allows simultaneous selection of multiple word lengths and even some function approximation, primarily based on Taylor series. Starting from real-valued representation, such as Taylor series, we rely on arithmetic transform to explore maximum imprecision by a branch-and-bound search algorithm to investigate imprecision. We also adopt a new tight-bound interval scheme, and derive a precision optimization algorithm that explores multiple precision parameters to get an implementation with smallest area cost.