Code generation for compiled bit-true simulation for DSP application
Proceedings of the 11th international symposium on System synthesis
A methodology and design environment for DSP ASIC fixed point refinement
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
FRIDGE: a fixed-point design and simulation environment
Proceedings of the conference on Design, automation and test in Europe
A Priori Worst Case Error Bounds for Floating-Point Computations
IEEE Transactions on Computers
Analog circuit sizing based on formal methods using affine arithmetic
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Proceedings of the 40th annual Design Automation Conference
Précis: A Design-Time Precision Analysis Tool
FCCM '02 Proceedings of the 10th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Accuracy Sensitive Word--Length Selection for Algorithm Optimization
ICCD '98 Proceedings of the International Conference on Computer Design
Automatic Evaluation of the Accuracy of Fixed-Point Algorithms
Proceedings of the conference on Design, automation and test in Europe
Lightweight floating-point arithmetic: case study of inverse discrete cosine transform
EURASIP Journal on Applied Signal Processing
Combined word-length optimization and high-level synthesis of digital signal processing systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
MiniBit: bit-width optimization via affine arithmetic
Proceedings of the 42nd annual Design Automation Conference
Custom-optimized multiplierless implementations of DSP algorithms
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
A unified framework for statistical timing analysis with coupling and multiple input switching
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Efficient design methods for embedded communication systems
EURASIP Journal on Embedded Systems
A stochastic bitwidth estimation technique for compact and low-power custom processors
ACM Transactions on Embedded Computing Systems (TECS)
Statistical noise margin estimation for sub-threshold combinational circuits
Proceedings of the 2008 Asia and South Pacific Design Automation Conference
Symbolic noise analysis approach to computational hardware optimization
Proceedings of the 45th annual Design Automation Conference
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
Fast trade-off evaluation for digital signal processing systems during wordlength optimization
Proceedings of the 2009 International Conference on Computer-Aided Design
Towards program optimization through automated analysis of numerical precision
Proceedings of the 8th annual IEEE/ACM international symposium on Code generation and optimization
Bit-width allocation for hardware accelerators for scientific computing using SAT-modulo theory
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Robust design methods for hardware accelerators for iterative algorithms in scientific computing
Proceedings of the 47th Design Automation Conference
Optimization of imprecise circuits represented by Taylor series and real-valued polynomials
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Test Case Generation for Adequacy of Floating-point to Fixed-point Conversion
Electronic Notes in Theoretical Computer Science (ENTCS)
Tradeoff between Approximation Accuracy and Complexity for Range Analysis using Affine Arithmetic
Journal of Signal Processing Systems
Finite precision bit-width allocation using SAT-modulo theory
Proceedings of the Conference on Design, Automation and Test in Europe
SQNR estimation of fixed-point DSP algorithms
EURASIP Journal on Advances in Signal Processing
ESL Design and Verification: A Prescription for Electronic System Level Methodology
ESL Design and Verification: A Prescription for Electronic System Level Methodology
Multi-level customisation framework for curve based monte carlo financial simulations
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
Optimising performance of quadrature methods with reduced precision
ARC'12 Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applications
A bit too precise? bounded verification of quantized digital filters
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Synthesis of fixed-point programs
Proceedings of the Eleventh ACM International Conference on Embedded Software
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Translating digital signal processing (DSP) software intoits finite-precision hardware implementation is often a time-consumingtask. We describe a new static analysis techniquethat can accurately analyze finite-precision effects arisingfrom fixed-point implementations of DSP algorithms.The technique is based on recent interval representation methodsfrom affine arithmetic, and the use of new probabilisticbounds. The resulting numerical error estimates are comparableto detailed statistical simulation, but achieve speedupsof four to five orders of magnitude by avoiding actual bit-truesimulation. We show error analysis results on both feedforward and feedback DSP kernels.