DAC '96 Proceedings of the 33rd annual Design Automation Conference
Calculating worst-case gate delays due to dominant capacitance coupling
DAC '97 Proceedings of the 34th annual Design Automation Conference
Determination of worst-case aggressor alignment for delay calculation
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On switch factor based analysis of coupled RC interconnects
Proceedings of the 37th Annual Design Automation Conference
TACO: timing analysis with coupling
Proceedings of the 37th Annual Design Automation Conference
Miller factor for gate-level coupling delay calculation
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
First-order incremental block-based statistical timing analysis
Proceedings of the 41st annual Design Automation Conference
STAC: statistical timing analysis with correlation
Proceedings of the 41st annual Design Automation Conference
Statistical gate delay model considering multiple input switching
Proceedings of the 41st annual Design Automation Conference
Fast, Accurate Static Analysis for Fixed-Point Finite-Precision Effects in DSP Designs
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Block-based Static Timing Analysis with Uncertainty
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
"AU: Timing Analysis Under Uncertainty
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Statistical Timing Analysis Considering Spatial Correlations using a Single Pert-Like Traversal
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Statistical Timing Analysis for Intra-Die Process Variations with Spatial Correlations
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Dynamic range estimation for nonlinear systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Statistical gate sizing for timing yield optimization
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Timing analysis with crosstalk is a fixpoint on a complete lattice
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Advances in Computation of the Maximum of a Set of Random Variables
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Statistical gate sizing for timing yield optimization
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Proceedings of the 43rd annual Design Automation Conference
Estimating path delay distribution considering coupling noise
Proceedings of the 17th ACM Great Lakes symposium on VLSI
An accurate sparse matrix based framework for statistical static timing analysis
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Microarchitecture parameter selection to optimize system performance under process variation
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
A novel criticality computation method in statistical timing analysis
Proceedings of the conference on Design, automation and test in Europe
Modeling crosstalk in statistical static timing analysis
Proceedings of the 45th annual Design Automation Conference
An accurate sparse-matrix based framework for statistical static timing analysis
Integration, the VLSI Journal
| Hi-index | 0.00 |
As technology scales to smaller dimensions, increasing process variations, coupling induced delay variations and multiple input switching effects make timing verification extremely challenging. In this paper, we establish a theoretical framework for statistical timing analysis with coupling and multiple input switching. We prove the convergence of our proposed iterative approach and discuss implementation issues under the assumption of a Gaussian distribution for the parameters of variation. A statistical timer based on our proposed approach is developed and experimental results are presented for the IS-CAS benchmarks. We juxtapose our timer with a single pass, non iterative statistical timer that does not consider the mutual dependence of coupling with timing and another statistical timer that handles coupling deterministically. Monte Carlo simulations reveal a distinct gain (up to 24%) in accuracy by our approach in comparison to the others mentioned.