System level fixed-point design based on an interpolative approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
A methodology and design environment for DSP ASIC fixed point refinement
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs
Proceedings of the conference on Design, automation and test in Europe
Polynomial circuit models for component matching in high-level synthesis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Accuracy Sensitive Word--Length Selection for Algorithm Optimization
ICCD '98 Proceedings of the International Conference on Computer Design
Automated fixed-point data-type optimization tool for signal processing and communication systems
Proceedings of the 41st annual Design Automation Conference
Unifying Bit-Width Optimisation for Fixed-Point and Floating-Point Designs
FCCM '04 Proceedings of the 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Combined word-length optimization and high-level synthesis of digital signal processing systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wordlength optimization for linear digital signal processing
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Accuracy-Guaranteed Bit-Width Optimization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fixed-point error analysis and word length optimization of 8×8 IDCT architectures
IEEE Transactions on Circuits and Systems for Video Technology
Bit-width allocation for hardware accelerators for scientific computing using SAT-modulo theory
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimization of imprecise circuits represented by Taylor series and real-valued polynomials
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 16th Asia and South Pacific Design Automation Conference
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We consider synthesis of arithmetic DSP circuits with finite precision fixed-point operations. The aim is to choose the lowest cost implementation that matches a real-valued specification within the allowed imprecision. Starting from Taylor Series or real-valued polynomials, we demonstrate first a method to obtain satisfying implementations that uses intermediate Arithmetic Transform polynomials as an analytical apparatus suitable to precision analysis for both the quantization (bit-width) and approximation sources of imprecision. We then derive the precision optimization algorithm that explores multiple precision parameters in a branch-and-bound search.