The C programming language
Digital receiver design using VHDL generation from data flow graphs
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
FRIDGE: An Interactive Code Generation Environment for HW/SW CoDesign
ICASSP '97 Proceedings of the 1997 IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP '97) -Volume 1 - Volume 1
A programming environment for the design of complex high speed ASICs
DAC '98 Proceedings of the 35th annual Design Automation Conference
A methodology and design environment for DSP ASIC fixed point refinement
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Towards a new standard for system-level design
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Heuristic datapath allocation for multiple wordlength systems
Proceedings of the conference on Design, automation and test in Europe
FRIDGE: a fixed-point design and simulation environment
Proceedings of the conference on Design, automation and test in Europe
Improved merging of datapath operators using information content and required precision analysis
Proceedings of the 38th annual Design Automation Conference
Proceedings of the 38th annual Design Automation Conference
A novel approach to code analysis of digital signal processing systems
CASES '01 Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems
High-level synthesis of multiple-precision circuits independent of data-objects length
Proceedings of the 39th annual Design Automation Conference
Automatic floating-point to fixed-point conversion for DSP code generation
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Multiple-Wordlength Resource Binding
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)
Synthesis of saturation arithmetic architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automatic Floating to Fixed Point Translation and its Application to Post-Rendering 3D Warping
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Multiple Precision for Resource Minimization
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Bit-Width Selection for Data-Path Implementations
Proceedings of the 12th international symposium on System synthesis
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Minimization of fractional wordlength on fixed-point conversion for high-level synthesis
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Précis: A Usercentric Word-Length Optimization Tool
IEEE Design & Test
Quality-driven design by bitwidth optimization for video applications
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Design and DSP implementation of fixed-point systems
EURASIP Journal on Applied Signal Processing
Floating-to-fixed-point conversion for digital signal processors
EURASIP Journal on Applied Signal Processing
A stochastic bitwidth estimation technique for compact and low-power custom processors
ACM Transactions on Embedded Computing Systems (TECS)
Proceedings of the 45th annual Design Automation Conference
A java simulation tool for fixed-point system design
Proceedings of the 2nd International Conference on Simulation Tools and Techniques
Compiling for reconfigurable computing: A survey
ACM Computing Surveys (CSUR)
Optimization of imprecise circuits represented by Taylor series and real-valued polynomials
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Tradeoff between Approximation Accuracy and Complexity for Range Analysis using Affine Arithmetic
Journal of Signal Processing Systems
| Hi-index | 0.00 |
The design process for fixed-point implementations eitherin software or in hardware requires a bit-true specificationof the algorithm in order to analyze quantization effectson an algorithmical level, abstracting from implementationaldetails.On the other hand, system design starts froma floating-point description into a fixed-point description becomesnecessary.Within this paper we present a tool thatallows an automated, interactive transformation from floating-pointANSI-C into a bit-true specification based ona new data type fixed that is introduced as an extensionto ANSI-C.The concept is rooted in a sophisticated datadependency analysis that allows to handle control structuresas well as pointers.It is part of the fixed-point designenvironment FRIDGE which includes an advanced simulatorthat covers the extended ANSI-C syntax as well astarget specific compilers which allow to generate efficientfixed-point implementations either for HW or for SW, startingfrom the bit-true algorithm specification.