Automatic floating-point to fixed-point conversion for DSP code generation

Authors:
Daniel Menard;Daniel Chillet;François Charot;Olivier Sentieys
Affiliations:
University of Rennes I, Lannion, FRANCE;University of Rennes I, Lannion, FRANCE;Campus de Beaulieu, Rennes cedex, FRANCE;Campus de Beaulieu, Rennes cedex, FRANCE
Venue:
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Year:
2002

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Abstract

The development of methodologies for the automatic implementation of floating-point algorithms in fixed-point architectures is required for the minimization of cost, power consumption and time to market of digital signal processing applications. In this paper, a new methodology of implementation in Digital Signal Processors (DSP) under accuracy constraint is presented. In comparison with the existing methodologies, the DSP architecture is completely taken into account for optimizing the execution time under accuracy constraint. The justification and the different stages of our methodology are presented.