A floating-point to integer C converter with shift reduction for fixed-point digital signal processors

  • Authors:
  • Ki-Il Kum;Jiyang Kang;Wonyong Sung

  • Affiliations:
  • Sch. of Electr. Eng., Seoul Nat. Univ., South Korea;-;-

  • Venue:
  • ICASSP '99 Proceedings of the Acoustics, Speech, and Signal Processing, 1999. on 1999 IEEE International Conference - Volume 04
  • Year:
  • 1999

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Abstract

A floating-point to integer C program translator is developed for convenient programming and efficient use of fixed-point programmable digital signal processors (DSPs). It not only converts data types and supports automatic scaling, but also conducts shift optimization to enhance execution speed. Since the input and output of this translator are ANSI C compliant programs, it can be used for any fixed-point DSP that supports ANSI C compiler. A shift reduction method is developed for minimizing the scaling overhead of translated integer C programs. It considers the data-path of a target processor and profiling results. Using the shift reduction method, 4% to 37% speedup is obtained. The translated integer C codes are 20 to 400 times faster than the floating-point versions when applied to TMS320C50, TMS320C60 and Motorola 56000 DSPs.