System level fixed-point design based on an interpolative approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
SONIC - A Plug-In Architecture for Video Processing
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Heuristic datapath allocation for multiple wordlength systems
Proceedings of the conference on Design, automation and test in Europe
Multiple-Wordlength Resource Binding
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Allocation of multiple precision behaviors for maximal bit level reuse of hardware resources
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Feasibility analysis of reconfigurable computing in low-power wireless sensor applications
ARC'11 Proceedings of the 7th international conference on Reconfigurable computing: architectures, tools and applications
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This paper presents the Synoptix high-level synthesis and precision optimization system for FPGAs. Given abstract specifications in the form of infinite precision signal flow graphs and a set of error constraints; Synoptix will create hardware descriptions of fixed-point arithmetic implementations. The width of each signal is individually optimized in order to achieve the minimal resource utilization while satisfying user-specified constraints such as signal-to-noise ratio. A heuristic for solving the optimization problem is introduced, and the results of implementations on an Altera Flex10k-based reconfigurable computing platform are reported. It is demonstrated that significant area reductions can be obtained by optimizing signal widths individually, compared to the use of a single uniform signal width.