A co-synthesis approach to embedded system design automation
Design Automation for Embedded Systems
An efficient implementation of reactivity for modeling hardware in the scenic design environment
DAC '97 Proceedings of the 34th annual Design Automation Conference
System level fixed-point design based on an interpolative approach
DAC '97 Proceedings of the 34th annual Design Automation Conference
Advanced compiler design and implementation
Advanced compiler design and implementation
Methodology for hardware/software co-verification in C/C++ (short paper)
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Preemption in Concurrent Systems
Proceedings of the 13th Conference on Foundations of Software Technology and Theoretical Computer Science
The TACO protocol processor simulation environment
Proceedings of the ninth international symposium on Hardware/software codesign
Synthesizing RTL Hardware from Java Byte Codes
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
SOMA: a tool for synthesizing and optimizing memory accesses in ASICs
CODES+ISSS '05 Proceedings of the 3rd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
Miniaturization platform for wireless sensor nodes based on 3D-packaging technologies
Proceedings of the 5th international conference on Information processing in sensor networks
Automatic generation of hardware/software interfaces
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Exploring design space using transaction level models
ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
MobileFBP: Designing portable reconfigurable applications for heterogeneous systems
Journal of Systems Architecture: the EUROMICRO Journal
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Huge new design challenges for system-on-chip (SoC) are the result of decreasing time-to-market coupled with rapidly increasing gate counts and embedded software representing 50-90 percent of the functionality. The exchange of system-level intellectual property (IP) models for creating executable specifications has become a key strategic element for efficient system-to-silicon design flows. Because C and C++ are the dominant languages used by chip architects, systems engineers and software engineers today, we believe that a C-based approach to hardware modeling is necessary. This will enable co-design, providing a more natural solution to partitioning functionality between hardware and software. In this paper we present the design of SystemC, a C++ class library that provides the necessary features for modeling design hierarchy, concurrency, and reactivity in hardware. We will also describe experiences of using SystemC 1) for the co-verification of 8051 processor with a bus-functional model and 2) for the modeling and simulation of an MPEG-2 video decoder.