An efficient implementation of reactivity for modeling hardware in the scenic design environment

  • Authors:
  • Stan Liao;Steve Tjiang;Rajesh Gupta

  • Affiliations:
  • Advanced Technology Group, Synopsys, Inc.;Advanced Technology Group, Synopsys, Inc.;Dept. of Information and Computer Science, UC Irvine

  • Venue:
  • DAC '97 Proceedings of the 34th annual Design Automation Conference
  • Year:
  • 1997

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Abstract

Reactivity is one of the key features of hardwaredescription languages. We present an efficient implementationof reactivity in the Scenic framework that allows the systemdesigner to model hardware blocks. Scenic allows the designerto use C++ to model mixed hardware-software systems witha C++ compiler and a small library and without the need ofa complex event-driven run-time kernel often found embeddedin hardware description languages (HDL) such as VHDL andVerilog. Moreover, Scenic hardware descriptions can be easilymapped to HDL and synthesized into hardware implementationsusing commercially available tools.In this paper we present Scenic's implementation of concurrency(signals and processes) and reactivity (waiting andwatching). When C++ is used as an HDL, context-switchingoverhead can become a significant performance issue duringsimulation. We introduce the notion of delayed expressionobjects, orlambdas, to reduce context-switching. Examplesand experimental results are presented to show the utility andsimulation efficiency using the Scenic framework.