Communicating sequential processes
Communicating sequential processes
Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
LUSTRE: a declarative language for real-time programming
POPL '87 Proceedings of the 14th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
Efficiently computing static single assignment form and the control dependence graph
ACM Transactions on Programming Languages and Systems (TOPLAS)
Acta Informatica
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Handshake circuits: an asynchronous architecture for VLSI programming
Handshake circuits: an asynchronous architecture for VLSI programming
Bounded scheduling of process networks
Bounded scheduling of process networks
An efficient implementation of reactivity for modeling hardware in the scenic design environment
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Task generation and compile-time scheduling for mixed data-control embedded software
Proceedings of the 37th Annual Design Automation Conference
An Implementation of Constructive Synchronous Programs in POLIS
Formal Methods in System Design
Efficient compilation of process-based concurrent programs without run-time scheduling
Proceedings of the conference on Design, automation and test in Europe
An Analysis of Determinacy Using a Trace-Theoretic Model of Asynchronous Circuits
ASYNC '03 Proceedings of the 9th International Symposium on Asynchronous Circuits and Systems
Compositional Software Synthesis of Communicating Processes
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
Scheduling dynamic dataflow graphs with bounded memory using the token flow model
Generating fast code from concurrent program dependence graphs
Proceedings of the 2004 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Deterministic receptive processes are Kahn processes
MEMOCODE '05 Proceedings of the 2nd ACM/IEEE International Conference on Formal Methods and Models for Co-Design
Efficient code generation from SHIM models
Proceedings of the 2006 ACM SIGPLAN/SIGBED conference on Language, compilers, and tool support for embedded systems
Scheduling-independent threads and exceptions in SHIM
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
SystemJ compilation using the tandem virtual machine approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Accelerating multi-party scheduling for transaction-level modeling
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Concurrency and Communication: Lessons from the SHIM Project
SEUS '09 Proceedings of the 7th IFIP WG 10.2 International Workshop on Software Technologies for Embedded and Ubiquitous Systems
Buffer sharing in CSP-like programs
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
SystemJ: A GALS language for system level design
Computer Languages, Systems and Structures
Buffer sharing in rendezvous programs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special section on the ACM IEEE international conference on formal methods and models for codesign (MEMOCODE) 2009
An alternative polychronous model and synthesis methodology for model-driven embedded software
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
Deterministic OpenMP for race-free parallelism
HotPar'11 Proceedings of the 3rd USENIX conference on Hot topic in parallelism
A virtual memory foundation for scalable deterministic parallelism
Proceedings of the Second Asia-Pacific Workshop on Systems
Automatic generation of hardware/software interfaces
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Exploiting parallelism in deterministic shared memory multiprocessing
Journal of Parallel and Distributed Computing
Scenario-based design flow for mapping streaming applications onto on-chip many-core systems
Proceedings of the 2012 international conference on Compilers, architectures and synthesis for embedded systems
A compiler infrastructure for embedded heterogeneous MPSoCs
Proceedings of the 2013 International Workshop on Programming Models and Applications for Multicores and Manycores
Design and optimization of multi-clocked embedded systems using formal technique
Proceedings of the 2013 9th Joint Meeting on Foundations of Software Engineering
A compiler infrastructure for embedded heterogeneous MPSoCs
Parallel Computing
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Typical embedded hardware/software systems are implemented using a combination of C and an HDL such as Verilog. While each is well-behaved in isolation, combining the two gives a nondeterministic model of computation whose ultimate behavior must be validated through expensive (cycle-accurate) simulation. We propose an alternative for describing such systems. Our software/ hardware integration medium (SHIM) model, effectively Kahn networks with rendezvous communication, provides deterministic concurrency. We present the Tiny-SHIM language for such systems and its semantics, demonstrate how to implement it in hardware and software, and discuss how it can be used to model a real-world system. By providing a powerful, deterministic formalism for expressing systems, designing systems, and verifying their correctness will become easier.