Communicating sequential processes
Communicating sequential processes
Detection of Ada Static Deadlocks Using Petri Net Invariants
IEEE Transactions on Software Engineering
Communicating reactive processes
POPL '93 Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
The sugarCubes tool box: a reactive Java framework
Software—Practice & Experience
ECL: a specification environment for system-level design
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
IEEE Transactions on Software Engineering
REFLIX: A Processor Core for Reactive Embedded Applications
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
ReactiveML: a reactive extension to ML
PPDP '05 Proceedings of the 7th ACM SIGPLAN international conference on Principles and practice of declarative programming
REMIC: design of a reactive embedded microprocessor core
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Scheduling-independent threads and exceptions in SHIM
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
SHIM: a deterministic model for heterogeneous embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
An Esterel compiler for large control-dominated systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
SystemJ: A GALS language for system level design
Computer Languages, Systems and Structures
RJOP: a customized Java processor for reactive embedded systems
Proceedings of the 48th Design Automation Conference
System-level approach to the design of a smart distributed surveillance system using systemj
ACM Transactions on Embedded Computing Systems (TECS)
GALS-HMP: A heterogeneous multiprocessor for embedded applications
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
GALS-CMP: chip-multiprocessor for GALS embedded systems
ARCS'13 Proceedings of the 26th international conference on Architecture of Computing Systems
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SystemJ is a language based on the Globally Asynchronous Locally Synchronous (GALS) paradigm. A SystemJ program is a collection of GALS nodes, also called clock domains, and each clock domain is a synchronous program that extends the Java language. Initial compilation of SystemJ has been to standard Java executing on a Java Virtual Machine (JVM), which is both inefficient and bulky for small embedded systems. This article proposes a new approach for compiling and executing SystemJ using a new type of virtual machine, called a Tandem Virtual Machine (TVM). The TVM approach provides an efficient implementation of SystemJ on both standard processors and resource-constrained embedded processors. The new approach is based on separating the control-driven and data-driven operations for execution on two virtual machines. While the JVM executes the data-driven operations, a Control Virtual Machine (CVM) is introduced to execute the control-driven parts of a SystemJ program. The TVM approach is capable of handling all data-driven and control-driven operations required by the GALS model. The benchmark results show that the TVM has code size improvements of over 60% on average and also a substantial improvement in execution speed over standard Java-based compilation.