Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Statecharts: A visual formalism for complex systems
Science of Computer Programming
Programming and Verifying Real-Time Systems by Means of the Synchronous Data-Flow Language LUSTRE
IEEE Transactions on Software Engineering - Special issue: specification and analysis of real-time systems
Communicating reactive processes
POPL '93 Proceedings of the 20th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Theoretical Computer Science
Implementation of the data-flow synchronous language SIGNAL
PLDI '95 Proceedings of the ACM SIGPLAN 1995 conference on Programming language design and implementation
Communicating sequential processes
Communications of the ACM
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Context-sensitive timing analysis of Esterel programs
Proceedings of the 46th Annual Design Automation Conference
SHIM: a deterministic model for heterogeneous embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Today’s system-on-chip and distributed systems are commonly equipped with multiple clocks. The key challenge in designing such systems is that heterogenous control-oriented and data-oriented behaviors within one clock domain, and asynchronous communications between two clock domains have to be captured and evaluated in a single framework. In this paper, we propose to use timed automata and synchronous dataflow to capture the dynamic behaviors of multi-clock embedded systems. A timed automata and synchronous dataflow based modeling and analyzing framework is constructed to evaluate and optimize the performance of multiclock embedded systems. Data-oriented behaviors are captured by synchronous dataflow, while synchronous control-oriented behaviors are captured by timed automata, and inter clock-domain asynchronous communication can be modeled in an interface timed automaton or a synchronous dataflow module with the CSP mechanism. The behaviors of synchronous dataflow are interpreted by some equivalent timed automata to maintain the semantic consistency of the mixed model. Then, various functional properties can be simulated and verified within the framework. We apply this framework in the design process of a sub-system that is used in real world subway communication control system