Static Worst-Case Execution Time Analysis of Synchronous Programs
Ada-Europe '00 Proceedings of the 5th Ada-Europe International Conference on Reliable Software Technologies
RTSS '03 Proceedings of the 24th IEEE International Real-Time Systems Symposium
Chronos: A timing analyzer for embedded software
Science of Computer Programming
Worst Case Reaction Time Analysis of Concurrent Reactive Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Performance debugging of Esterel specifications
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Compiling Esterel
Timing analysis of esterel programs on general-purpose multiprocessors
Proceedings of the 47th Design Automation Conference
Efficient WCRT analysis of synchronous programs using reachability
Proceedings of the 48th Design Automation Conference
Design and optimization of multi-clocked embedded systems using formal technique
Proceedings of the 2013 9th Joint Meeting on Foundations of Software Engineering
Timing analysis enhancement for synchronous program
Proceedings of the 21st International conference on Real-Time Networks and Systems
Passive code in synchronous programs
ACM Transactions on Embedded Computing Systems (TECS) - Special Section ESFH'12, ESTIMedia'11 and Regular Papers
ILPc: a novel approach for scalable timing analysis of synchronous programs
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Traditionally, synchronous languages, such as Esterel, have been compiled into hardware, where timing analysis is relatively easy. When compiled into software -- e.g., into sequential C code -- very conservative estimation techniques have been used, where the focus has only been on obtaining safe timing estimates and not on the cost of the implementation. While this was acceptable in avionics, efficient implementations and hence tight timing estimates are needed in more cost-sensitive application domains. Lately, a number of advances in Worst-Case Execution Time (WCET) analysis techniques, coupled with the growing use of software in domains such as automotives, have led to a considerable interest in timing analysis of code generated from Esterel specifications. In this paper we propose techniques to obtain tight estimates on the processing time of input events by sequential C code generated from Esterel programs. Execution of an Esterel program -- as in all other synchronous languages -- is logically made up of a sequence of clock ticks. In reality, they take non-zero time which depends on the generated C code as well as the underlying hardware platform on which this code is executed. Apart from exploiting the specific structure of this C code to obtain tight WCET estimates, we capture program-level contexts across ticks in order to obtain tight estimates on response times of events whose processing spans across multiple clock ticks. Such tighter estimates immediately translate into more cost-effective implementations. Our experimental results with realistic case studies show 30% reduction in timing estimates when program level context information is taken into account.