Worst Case Reaction Time Analysis of Concurrent Reactive Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Performance debugging of Esterel specifications
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Tight WCRT analysis of synchronous C programs
CASES '09 Proceedings of the 2009 international conference on Compilers, architecture, and synthesis for embedded systems
Context-sensitive timing analysis of Esterel programs
Proceedings of the 46th Annual Design Automation Conference
Timing analysis of esterel programs on general-purpose multiprocessors
Proceedings of the 47th Design Automation Conference
Combining IEC 61499 model-based design with component-based architecture for robotics
SIMPAR'12 Proceedings of the Third international conference on Simulation, Modeling, and Programming for Autonomous Robots
Precise timing analysis for direct-mapped caches
Proceedings of the 50th Annual Design Automation Conference
ILPc: a novel approach for scalable timing analysis of synchronous programs
Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded Systems
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Static computation of the worst-case reaction time (WCRT) is required for the real-time execution of synchronous programs. Existing approaches use model checking or integer linear programming. we formulate this as an abstraction-based reachability analysis yielding a lower worst case complexity. Benchmarking shows a significant overall speed-up of 64-times over existing approaches.