Communicating sequential processes
Communicating sequential processes
Statecharts: A visual formalism for complex systems
Science of Computer Programming
The ESTEREL synchronous programming language: design, semantics, implementation
Science of Computer Programming
Formal verification of embedded systems based on CFSM networks
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
Domains and lambda-calculi
Proof, language, and interaction
Synchronous Programming of Reactive Systems
Synchronous Programming of Reactive Systems
Constructive Analysis of Cyclic Circuits
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Formal analysis of synchronous circuits
Formal analysis of synchronous circuits
The intuitionism behind Statecharts steps
ACM Transactions on Computational Logic (TOCL)
Automatic Production of Globally Asynchronous Locally Synchronous Systems
EMSOFT '02 Proceedings of the Second International Conference on Embedded Software
The semantics and execution of a synchronous block-diagram language
Science of Computer Programming
Modeling and Validating Globally Asynchronous Design in Synchronous Frameworks
Proceedings of the conference on Design, automation and test in Europe - Volume 1
SHIM: a deterministic model for heterogeneous embedded systems
Proceedings of the 5th ACM international conference on Embedded software
Actors without Directors: A Kahnian View of Heterogeneous Systems
HSCC '09 Proceedings of the 12th International Conference on Hybrid Systems: Computation and Control
SHIM: a deterministic model for heterogeneous embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Programming parallelism with futures in lustre
Proceedings of the tenth ACM international conference on Embedded software
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Design tools for embedded reactive systems commonly use a model of computation that employs both synchronous and asynchronous communication styles. We form a junction between these two with an implementation of synchronous languages and circuits (Esterel) on asynchronous networks (POLIS). We implement fact propagation, the key concept of synchronous constructive semantics, on an asynchronous non-deterministic network: POLIS nodes (CFSMs) save state locally to deduce facts, and the network globally propagates facts between them. The result is a correct implementation of the synchronous input/output behavior of the program. Our model is compositional, and thus permits implementations at various levels of granularity from one CFSM per circuit gate to one CFSM per circuit. This allows one to explore various tradeoffs between synchronous and asynchronous implementations.