Static scheduling of synchronous data flow programs for digital signal processing
IEEE Transactions on Computers
Parallel program design: a foundation
Parallel program design: a foundation
Executing a Program on the MIT Tagged-Token Dataflow Architecture
IEEE Transactions on Computers
Synthesis of the hardware/software interface in microcontroller-based systems
ICCAD '92 1992 IEEE/ACM international conference proceedings on Computer-aided design
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
An efficient implementation of reactivity for modeling hardware in the scenic design environment
DAC '97 Proceedings of the 34th annual Design Automation Conference
Towards a new standard for system-level design
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Guarded commands, nondeterminacy and formal derivation of programs
Communications of the ACM
Proceedings of the ninth international symposium on Hardware/software codesign
Rapide: A Language and Toolset for Causal Event Modeling of Distributed System Architectures
WWCA '98 Proceedings of the Second International Conference on Worldwide Computing and Its Applications
The ESTEREL Synchronous Programming Language and its Mathematical Semantics
Seminar on Concurrency, Carnegie-Mellon University
Proceedings of the International Sympoisum on Theoretical Programming
StreamIt: A Language for Streaming Applications
CC '02 Proceedings of the 11th International Conference on Compiler Construction
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Mixing signals and modes in synchronous data-flow systems
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
EMSOFT '06 Proceedings of the 6th ACM & IEEE International conference on Embedded software
Scheduling as Rule Composition
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols
MEMOCODE '07 Proceedings of the 5th IEEE/ACM International Conference on Formal Methods and Models for Codesign
Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary
ECOOP '08 Proceedings of the 22nd European conference on Object-Oriented Programming
Synthesis from multi-cycle atomic actions as a solution to the timing closure problem
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Bounded dataflow networks and latency-insensitive circuits
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
SHIM: a deterministic model for heterogeneous embedded systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Designing safe, reliable systems using scade
ISoLA'04 Proceedings of the First international conference on Leveraging Applications of Formal Methods
Leveraging latency-insensitivity to ease multiple FPGA design
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
A Comparative Evaluation of High-Level Hardware Synthesis Using Reed–Solomon Decoder
IEEE Embedded Systems Letters
Operation-centric hardware description and synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hardware implementations of software programs based on hierarchical finite state machine models
Computers and Electrical Engineering
MobileFBP: Designing portable reconfigurable applications for heterogeneous systems
Journal of Systems Architecture: the EUROMICRO Journal
Hi-index | 0.00 |
Enabling new applications for mobile devices often requires the use of specialized hardware to reduce power consumption. Because of time-to-market pressure, current design methodologies for embedded applications require an early partitioning of the design, allowing the hardware and software to be developed simultaneously, each adhering to a rigid interface contract. This approach is problematic for two reasons: (1) a detailed hardware-software interface is difficult to specify until one is deep into the design process, and (2) it prevents the later migration of functionality across the interface motivated by efficiency concerns or the addition of features. We address this problem using the Bluespec Codesign Language~(BCL) which permits the designer to specify the hardware-software partition in the source code, allowing the compiler to synthesize efficient software and hardware along with transactors for communication between the partitions. The movement of functionality across the hardware-software boundary is accomplished by simply specifying a new partitioning, and since the compiler automatically generates the desired interface specifications, it eliminates yet another error-prone design task. In this paper we present BCL, an extension of a commercially available hardware design language (Bluespec SystemVerilog), a new software compiling scheme, and preliminary results generated using our compiler for various hardware-software decompositions of an Ogg Vorbis audio decoder, and a ray-tracing application.