802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec
SAMOS '08 Proceedings of the 8th international workshop on Embedded Computer Systems: Architectures, Modeling, and Simulation
Implementing a fast cartesian-polar matrix interpolator
MEMOCODE'09 Proceedings of the 7th IEEE/ACM international conference on Formal Methods and Models for Codesign
Airblue: a system for cross-layer wireless protocol development
Proceedings of the 6th ACM/IEEE Symposium on Architectures for Networking and Communications Systems
Compiling high throughput network processors
Proceedings of the ACM/SIGDA international symposium on Field Programmable Gate Arrays
Automatic generation of hardware/software interfaces
ASPLOS XVII Proceedings of the seventeenth international conference on Architectural Support for Programming Languages and Operating Systems
Proceedings of the eighth ACM/IEEE symposium on Architectures for networking and communications systems
Leveraging rule-based designs for automatic power domain partitioning
Proceedings of the International Conference on Computer-Aided Design
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Orthogonal Frequency-Division Multiplexing (OFDM) has become the preferred modulation scheme for both broadband and high bitrate digital wireless protocols because of its spectral efficiency and robustness against multipath interference. Although the components and overall structure of different OFDM protocols are functionally similar, the characteristics of the environment for which a wireless protocol is designed often result in different instantiations of various components. In this paper, we describe how we can instantiate baseband processoring of two different wireless protocols, namely 802.11a and 802.16 in Bluespec from a highly parameterized code for a generic OFDM protocol. Our approach results in highly reusable IP blocks that can dramatically reduce the time-to-market of new OFDM protocols. One advantage of Bluespec over SystemC is that our code is synthesizable into high quality hardware, which we demonstrate via synthesis results. Using a Viterbi decoder we also demonstrate how parameterization can be used to study area-performance tradeoff in the implementation of a module. Furthermore, parameterized modules and modular composition can facilitate implementation-grounded algorithmic exploration in the design of new protocols.