Communicating sequential processes
Communicating sequential processes
An engineering environment for hardware/software co-simulation
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench
Algorithmic and Register-Transfer Level Synthesis: The System Architect's Workbench
AnyBoard: An FPGA-Based, Reconfigurable System
IEEE Design & Test
Hardware-software-codesign of application specific microcontrollers with the ASM environment
EURO-DAC '94 Proceedings of the conference on European design automation
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
Experiencing the codesign process: Microcomputer Systems II laboratory
SIGCSE '95 Proceedings of the twenty-sixth SIGCSE technical symposium on Computer science education
Cosimulation of real-time control systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Closeness metrics for system-level functional partitioning
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
A design system for special purpose processors based on architectures for distributed processing
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Procedure exlining: a new system-level specification transformation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Multiple-process behavioral synthesis for mixed hardware-software systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Procedure exlining: a transformation for improved system and behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Array mapping in behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
WWW based structuring of codesigns
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Symphony: a simulation backplane for parallel mixed-mode co-simulation of VLSI systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
The design of mixed hardware/software systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Model refinement for hardware-software codesign
ACM Transactions on Design Automation of Electronic Systems (TODAES)
COMET: a hardware-software codesign methodology
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hardware/software-cosimulation for mechatronic system design
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
An integrated approach to engineering computer systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hardware/software co-verification in ATM
ISSS '94 Proceedings of the 7th international symposium on High-level synthesis
An efficient implementation of reactivity for modeling hardware in the scenic design environment
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware/software co-design of an ATM network interface card: a case study
Proceedings of the 6th international workshop on Hardware/software codesign
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Procedure cloning: a transformation for improved system-level functional partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Multilanguage design of heterogeneous systems
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Fast hardware-software co-simulation using VHDL models
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A fuzzy approach to co-design system partitioning
SAC '95 Proceedings of the 1995 ACM symposium on Applied computing
CMAPS: a cosynthesis methodology for application-oriented parallel systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Codesign Approach to Real-time High Precision Control
Real-Time Systems
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Readings in hardware/software co-design
Protocol selection and interface generation for HW-SW codesign
Readings in hardware/software co-design
Incremental hardware estimation during hardware/software functional partitioning
Readings in hardware/software co-design
A hardware-software co-simulator for embedded system design and debugging
Readings in hardware/software co-design
Hardware-Software Partitioning at the Knowledge Level
Applied Intelligence
Reconfigurable Computing for Digital Signal Processing: A Survey
Journal of VLSI Signal Processing Systems
Synthesis of operation-centric hardware descriptions
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
Simulating Multimedia Systems with MVPSIM
IEEE Design & Test
Impact of System Partitioning on Test Cost
IEEE Design & Test
Computer-Aided Hardware-Software Codesign
IEEE Micro
Hardware-Software Partitioning: A Case for Constraint Satisfaction
IEEE Intelligent Systems
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
FM '99 Proceedings of the Wold Congress on Formal Methods in the Development of Computing Systems-Volume II
SLIF: a specification-level intermediate format for system design
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Model Refinement for Hardware-Software Codesign
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Towards a Model for Hardware and Software Functional Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
An Object-Oriented Communication Library for Hardware-Software CoDesign
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Interface Optimization During Hardware-Software Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
An integrated hardware-software cosimulation environment with automated interface generation
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
A platform for co-design and co-synthesis based on FPGA
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
HW/SW specification using OOM techniques
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
A consistent labeling approach to hardware software partitioning
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Hardware Software Partitioning Using Genetic Algorithm
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Comparison of Functional and Structural Partitioning
ISSS '96 Proceedings of the 9th international symposium on System synthesis
COSMOS: a codesign approach for communicating systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Configuration-level hardware/software partitioning for real-time embedded systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
VHDL system-level specification and partitioning in a hardware/software co-synthesis environment
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Constrained software generation for hardware-software systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Design flow for hardware/software cosynthesis of a video compression system
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Redesigning hardware-software systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
A CoDesign experience with the MCSE methodology
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Scheduling and Partitioning Schemes for Low Power Designs Using Multiple Supply Voltages
The Journal of Supercomputing
Software-friendly HW/SW co-simulation: an industrial case study
Proceedings of the conference on Design, automation and test in Europe: Designers' forum
Scheduling and optimal voltage selection with multiple supply voltages under resource constraints
Integration, the VLSI Journal
Hardware/Software Co-Design Methodology for Design of Embedded Systems
Integrated Computer-Aided Engineering
SDL/virtual prototype co-design for rapid architectural exploration of a mobile phone platform
SDL'09 Proceedings of the 14th international SDL conference on Design for motes and mobiles
Codesign system performance based on memory configurations
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
An approach for interface generation in the PISH co-design system
SBCCI'99 Proceedings of the XIIth conference on Integrated circuits and systems design
Tool support for hardware/software co-design of communication protocols
Computer Communications
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A behavioral model of a class of mixed hardware-software systems is presented. A codesign methodology for such systems is defined. The methodology includes hardware-software partitioning, behavioral synthesis, software compilation, and demonstration on a testbed consisting of a commercial central processing unit (CPU), field-programmable gate arrays, and programmable interconnections. Design examples that illustrate how certain characteristics of system behavior and constraints suggest hardware or software implementation are presented.