Architectural partitioning for system level design
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Combinatorial algorithms for integrated circuit layout
Combinatorial algorithms for integrated circuit layout
Using types to avoid redundant specialization
PEPM '91 Proceedings of the 1991 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
CHOP: A constraint-driven system-level partitioner
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
The design and implementation of the self compiler, an optimizing compiler for object-oriented programming languages
Specification and design of embedded systems
Specification and design of embedded systems
A method for partitioning UNITY language in hardware and software
EURO-DAC '94 Proceedings of the conference on European design automation
Incremental hardware estimation during hardware/software functional partitioning
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Procedure exlining: a transformation for improved system and behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
New algorithms for min-cut replication in partitioned circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Partitioning of VLSI circuits and systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
I/O and performance tradeoffs with the FunctionBus during multi-FPGA partitioning
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
SLIF: a specification-level intermediate format for system design
EDTC '95 Proceedings of the 1995 European conference on Design and Test
PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Towards a Model for Hardware and Software Functional Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A Comparison of Functional and Structural Partitioning
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Hardware/Software Partitioning with Iterative Improvement Heuristics
ISSS '96 Proceedings of the 9th international symposium on System synthesis
A methodology for control-dominated systems codesign
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Min-cut replication in partitioned networks
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Partitioning sequential programs for CAD using a three-step approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Hi-index | 0.00 |
Functional partitioning assigns the functions of a system's program-like specification among system components, such as standard-software and custom-hardware processors. We introduce a new transformation, called procedure cloning, that significantly improves functional partitioning results. The transformation creates a clone of a procedure for sole use by a particular procedure caller, so the clone can be assigned to the caller's processor, which in turn improves performance through reduced communication. Heuristics are used to prevent the exponential size increase that could occur if cloning were done indiscriminately. We introduce a variety of cloning heuristics, highlight experiments demonstrating the improvements obtained using cloning, and compare the various cloning heuristics.