Experience with ADAM synthesis system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Architectural partitioning for system level design
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Automated partitioning of hierarchically specified digital systems
DAC '82 Proceedings of the 19th Design Automation Conference
Specification partitioning for system design
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Closeness metrics for system-level functional partitioning
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Recent developments in high-level synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Rapid performance estimation for system design
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
I/O and performance tradeoffs with the FunctionBus during multi-FPGA partitioning
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Behavior tables: a basis for system representation and transformational system synthesis
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Port calling: a transformation for reducing I/O during multi-package functional partitioning
ISSS '97 Proceedings of the 10th international symposium on System synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A three-step approach to the functional partitioning of large behavioral processes
Proceedings of the 11th international symposium on System synthesis
Procedure cloning: a transformation for improved system-level functional partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimal synthesis of multichip architectures
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
A methodology and algorithms for the design of hard real-time multitasking ASICs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Optimal temporal partitioning and synthesis for reconfigurable architectures
Proceedings of the conference on Design, automation and test in Europe
Readings in hardware/software co-design
Incremental hardware estimation during hardware/software functional partitioning
Readings in hardware/software co-design
Automated design synthesis and partitioning for adaptive reconfigurable hardware
Hardware implementation of intelligent systems
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
Tightly Integrated Design Space Exploration with Spatial and Temporal Partitioning in SPARCS
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
SLIF: a specification-level intermediate format for system design
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Procedure cloning: a transformation for improved system-level functional partitioning
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Towards a Model for Hardware and Software Functional Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A Graph-Based Approach to the Synthesis of Multi-Chip Module Architectures
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-chip
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A Comparison of Functional and Structural Partitioning
ISSS '96 Proceedings of the 9th international symposium on System synthesis
An optimization approach to the synthesis of multichip architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
MULTIPAR: behavioral partition for synthesizing multiprocessor architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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