SpecSyn: an environment supporting the specify-explore-refine paradigm for hardware/software system design

  • Authors:

  • Daniel D. Gajski;Frank Vahid;Sanjiv Narayan;Jie Gong

  • Affiliations:

  • Department of Information and Computer Science, University of California, Irvine, CA;Department of Computer Science, University of California, Riverside, CA;Ambit Design Systems, Santa Clara CA;Qualcomm, Inc., San Diego, CA and Motorola, Inc., Tempe, AZ

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 1998

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Abstract

System-level design issues are gaining increasing attention, as behavioral synthesis tools and methodologies mature. We present the SpecSyn system-level design environment, which supports the new specify-explore-refine (SER) design paradigm. This three-step approach to design includes precise specification of system functionality, rapid exploration of numerous systemlevel design options, and refinement of the specification into one reflecting the chosen option. A system-level design option consists of an allocation of system components, such as standard and custom processors, memories, and buses, and a partitioning of functionality among those components. After refinement, the functionality assigned to each component can then be synthesized to hardware or compiled to software. We describe the issues and approaches for each part of the SpecSyn environment. The new paradigm and environment are expected to lead to a more than ten times reduction in design time, and our experiments support this expectation.