Towards optimal system-level design
DAC '93 Proceedings of the 30th international Design Automation Conference
Scheduling Algorithms for Multiprogramming in a Hard-Real-Time Environment
Journal of the ACM (JACM)
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Cosimulation of real-time control systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Sensitivity-driven co-synthesis of distributed embedded systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Efficient software performance estimation methods for hardware/software codesign
DAC '96 Proceedings of the 33rd annual Design Automation Conference
COSYN: hardware-software co-synthesis of embedded systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Computers
MOCSYN: multiobjective core-based single-chip system synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Codex-dp: co-design of communicating systems using dynamic programming
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Reliable estimation of execution time of embedded software
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Design of embedded systems: formal models, validation, and synthesis
Readings in hardware/software co-design
Readings in hardware/software co-design
Performance estimation for real-time distributed embedded systems
Readings in hardware/software co-design
Readings in hardware/software co-design
An architectural co-synthesis algorithm for distributed, embedded computing systems
Readings in hardware/software co-design
Incremental hardware estimation during hardware/software functional partitioning
Readings in hardware/software co-design
Process Partitioning for Distributed Embedded Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
The Interplay of Run-Time Estimation and Granularity in HW/SW Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
An evolutionary approach to system-level synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Quality-driven model-based architecture synthesis for real-time embedded SoCs
Journal of Systems Architecture: the EUROMICRO Journal
Using Genetic Algorithms for solving partitioning problem in codesign
IWANN '03 Proceedings of the 7th International Work-Conference on Artificial and Natural Neural Networks: Part II: Artificial Neural Nets Problem Solving Methods
ECBS'99 Proceedings of the 1999 IEEE conference on Engineering of computer-based systems
Pipelining-based tradeoffs for hardware/software codesign of multimedia systems
EURO-PDP'00 Proceedings of the 8th Euromicro conference on Parallel and distributed processing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Solving partitioning problem in codesign with ant colonies
IWINAC'05 Proceedings of the First international work-conference on the Interplay Between Natural and Artificial Computation conference on Artificial Intelligence and Knowledge Engineering Applications: a bioinspired approach - Volume Part II
| Hi-index | 0.00 |
In this paper, we present an approach to hardware/software partitioning for real-time embedded systems. The abstraction level we have adopted is referred to as the configuration level, where hardware is modeled as resources with no detailed functionality and software is modeled as tasks utilizing the resources. Through configuration-level analysis, cost and performance tradeoffs can be studied early in the design process and a large design space can be explored. Feasibility factor is introduced to measure the possibility of a real-time system being feasible, and is used as both a constraint and an attribute during the optimization process. Optimal partitioning is achieved through the use of an existing computer-aided design tool.