Modeling of Software Partition for Distributed Real-Time Applications
IEEE Transactions on Software Engineering
A binary-constraint search algorithm for minimizing hardware during hardware/software partitioning
EURO-DAC '94 Proceedings of the conference on European design automation
Performance analysis of embedded software using implicit path enumeration
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Hardware-software co-synthesis of fault-tolerant real-time distributed embedded systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Sensitivity-driven co-synthesis of distributed embedded systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Multiple-process behavioral synthesis for mixed hardware-software systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
An architectural co-synthesis algorithm for distributed, embedded computing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Configuration-level hardware/software partitioning for real-time embedded systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
VHDL system-level specification and partitioning in a hardware/software co-synthesis environment
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
COSYN: hardware-software co-synthesis of embedded systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
System-level exploration with SpecSyn
DAC '98 Proceedings of the 35th annual Design Automation Conference
Proceedings of the 6th international workshop on Hardware/software codesign
Hardware/software co-synthesis with memory hierarchies
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
A three-step approach to the functional partitioning of large behavioral processes
Proceedings of the 11th international symposium on System synthesis
IEEE Transactions on Computers
A hardware-software cosynthesis technique based on heterogeneous multiprocessor scheduling
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
Timing-driven HW/SW codesign based on task structuring and process timing simulation
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
MOCSYN: multiobjective core-based single-chip system synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 14th international symposium on Systems synthesis
Hardware/software co-synthesis with memory hierarchies
Readings in hardware/software co-design
HW/SW Co-design of Embedded Systems
Ada-Europe '99 Proceedings of the 1999 Ada-Europe International Conference on Reliable Software Technologies
Hardware-software cosynthesis of multi-mode multi-task embedded systems with real-time constraints
Proceedings of the tenth international symposium on Hardware/software codesign
Iterative schedule optimization for voltage scalable distributed embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS)
HW/SW partitioning techniques for multi-mode multi-task embedded applications
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
A dynamically constrained genetic algorithm for hardware-software partitioning
Proceedings of the 8th annual conference on Genetic and evolutionary computation
A HW/SW Partitioner for Multi-Mode Multi-Task Embedded Applications
Journal of VLSI Signal Processing Systems
RTDT: A static QoS manager, RT scheduling, HW/SW partitioning CAD tool
Microelectronics Journal
Automated memory-aware application distribution for Multi-processor System-on-Chips
Journal of Systems Architecture: the EUROMICRO Journal
Reliable multiprocessor system-on-chip synthesis
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
SoCDAL: System-on-chip design AcceLerator
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Highly-cited ideas in system codesign and synthesis
CODES+ISSS '08 Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis
Synergistic execution of stream programs on multicores with accelerators
Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
Hardware-software co-synthesis of hard real-time systems with reconfigurable FPGAs
Computers and Electrical Engineering
A Systematic Design Space Exploration of MPSoC Based on Synchronous Data Flow Specification
Journal of Signal Processing Systems
Pipelining-based tradeoffs for hardware/software codesign of multimedia systems
EURO-PDP'00 Proceedings of the 8th Euromicro conference on Parallel and distributed processing
Task scheduling for GPU accelerated OLAP systems
Proceedings of the 2011 Conference of the Center for Advanced Studies on Collaborative Research
SEAL'06 Proceedings of the 6th international conference on Simulated Evolution And Learning
Solving partitioning problem in codesign with ant colonies
IWINAC'05 Proceedings of the First international work-conference on the Interplay Between Natural and Artificial Computation conference on Artificial Intelligence and Knowledge Engineering Applications: a bioinspired approach - Volume Part II
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We present a new technique for partitioning processes in distributed embedded systems. Our heuristic algorithm minimizes both context switch and communication overhead under real-time deadline and process size constraints; it also tries to allocate functions to processors which are well-suited to that function. The algorithm analyzes the sensitivity of the latency of the task graph to changes in vertices hierarchical clustering, splitting and border adjusting. This algorithm can be used for initial partitioning during co-synthesis of distributed embedded systems. Synthesis of examples partitioned by our algorithm with implementations synthesized directly from the original example shows that our partitioning algorithm significantly improves the results obtainable by practical co-synthesis algorithms.