Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Introduction to programmable active memories
Systolic array processors
Mapping systolic arrays onto the map-oriented machine (MoM)
Systolic array processors
High level synthesis of ASICs under timing and synchronization constraints
High level synthesis of ASICs under timing and synchronization constraints
Partial orderings of event sets and their application to prototyping concurrent, timed systems
Journal of Systems and Software - Special issue on applying specification, verification, and validation techniques to industrial software systems
Synthesis fo the hardware/software interface in microcontroller-based systems
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Partitioning and Scheduling Parallel Programs for Multiprocessors
Partitioning and Scheduling Parallel Programs for Multiprocessors
IEEE Design & Test
Computer
Design of heterogeneous ICs for mobile and personal communication systems
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Software synthesis for real-time information processing systems
LCTES '95 Proceedings of the ACM SIGPLAN 1995 workshop on Languages, compilers, & tools for real-time systems
Cosimulation of real-time control systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Closeness metrics for system-level functional partitioning
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Performance-complexity analysis in hardware-software codesign for real-time systems
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
A design system for special purpose processors based on architectures for distributed processing
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Procedure exlining: a new system-level specification transformation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Composing ActivityCharts/StateCharts, SDL and SAO specifications for codesign in avionics
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Sensitivity-driven co-synthesis of distributed embedded systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Multiple-process behavioral synthesis for mixed hardware-software systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
The Chinook hardware/software co-synthesis system
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Interface co-synthesis techniques for embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Communication synthesis for distributed embedded systems
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Object-oriented cosynthesis of distributed embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
The design of mixed hardware/software systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A hardware/software partitioning algorithm for designing pipelined ASIPs with least gate counts
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Analysis of operation delay and execution rate constraints for embedded systems
DAC '96 Proceedings of the 33rd annual Design Automation Conference
A strategy for real-time kernel support in application-specific HW/SW embedded architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Model refinement for hardware-software codesign
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Exploration of hardware/software design space through a codesign of robot arm controller
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Synthesis from mixed specifications
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
CoWare—a design environment for heterogenous hardware/software systems
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Hardware/software partitioning of VHDL system specifications
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
I/O and performance tradeoffs with the FunctionBus during multi-FPGA partitioning
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Port calling: a transformation for reducing I/O during multi-package functional partitioning
ISSS '97 Proceedings of the 10th international symposium on System synthesis
A scheduling and pipelining algorithm for hardware/software systems
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Static timing analysis of embedded software
DAC '97 Proceedings of the 34th annual Design Automation Conference
Memory-CPU size optimization for embedded system designs
DAC '97 Proceedings of the 34th annual Design Automation Conference
ISDL: an instruction set description language for retargetability
DAC '97 Proceedings of the 34th annual Design Automation Conference
System-level synthesis of low-power hard real-time systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
Hardware/software partitioning and pipelining
DAC '97 Proceedings of the 34th annual Design Automation Conference
Application-driven synthesis of core-based systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Transformational partitioning for co-design of multiprocessor systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator
DAC '98 Proceedings of the 35th annual Design Automation Conference
System-level exploration with SpecSyn
DAC '98 Proceedings of the 35th annual Design Automation Conference
A path analysis based partitioning for time constrained embedded systems
Proceedings of the 6th international workshop on Hardware/software codesign
Hardware/software co-synthesis with memory hierarchies
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Performance Estimation for Real-Time Distributed Embedded Systems
IEEE Transactions on Parallel and Distributed Systems
Communication and interface synthesis on a rapid protoyping hardware/software codesign system
Proceedings of the 11th international symposium on System synthesis
A tool for partitioning and pipelined scheduling of hardware-software systems
Proceedings of the 11th international symposium on System synthesis
A three-step approach to the functional partitioning of large behavioral processes
Proceedings of the 11th international symposium on System synthesis
Procedure cloning: a transformation for improved system-level functional partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Using codesign techniques to support analog functionality
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
A framework for user assisted design space exploration
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A fuzzy approach to co-design system partitioning
SAC '95 Proceedings of the 1995 ACM symposium on Applied computing
A methodology and algorithms for the design of hard real-time multitasking ASICs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
CMAPS: a cosynthesis methodology for application-oriented parallel systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fast performance prediction for periodic task systems
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
A method to derive application-specific embedded processing cores
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Hardware-software co-design of embedded reconfigurable architectures
Proceedings of the 37th Annual Design Automation Conference
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Constraint-driven system partitioning
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Hardware/software synthesis of formal specifications in codesign of embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Proceedings of the conference on Design, automation and test in Europe
Code placement in hardware/software co-synthesis to improve performance and reduce cost
Proceedings of the conference on Design, automation and test in Europe
A HW/SW partitioning algorithm for dynamically reconfigurable architectures
Proceedings of the conference on Design, automation and test in Europe
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
A knowledge-based system for hardware-software partitioning
Proceedings of the conference on Design, automation and test in Europe
An algorithm for synthesis of large time-constrained heterogeneous adaptive systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An approach to incremental design of distributed embedded systems
Proceedings of the 38th annual Design Automation Conference
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
A detailed cost model for concurrent use with hardware/software co-design
Proceedings of the 39th annual Design Automation Conference
Readings in hardware/software co-design
Performance estimation for real-time distributed embedded systems
Readings in hardware/software co-design
Hardware/software co-synthesis with memory hierarchies
Readings in hardware/software co-design
System level memory optimization for hardware-software co-design
Readings in hardware/software co-design
An architectural co-synthesis algorithm for distributed, embedded computing systems
Readings in hardware/software co-design
Interface co-synthesis techniques for embedded systems
Readings in hardware/software co-design
Protocol selection and interface generation for HW-SW codesign
Readings in hardware/software co-design
Co-synthesis and co-simulation of control-dominated embedded systems
Readings in hardware/software co-design
Incremental hardware estimation during hardware/software functional partitioning
Readings in hardware/software co-design
Hardware-software prototyping from LOTOS
Readings in hardware/software co-design
Partitioning sequential programs for CAD using a three-step approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated design synthesis and partitioning for adaptive reconfigurable hardware
Hardware implementation of intelligent systems
Hardware-Software Partitioning at the Knowledge Level
Applied Intelligence
Hardware-Software partitioning and pipelined scheduling of transformative applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
Computer-Aided Hardware-Software Codesign
IEEE Micro
Hardware-Software Partitioning: A Case for Constraint Satisfaction
IEEE Intelligent Systems
MASCOTS '95 Proceedings of the 3rd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems
Hardware/Software Embedded System Specifiaction and Design Using Ada and VHDL
Ada-Europe '99 Proceedings of the 1999 Ada-Europe International Conference on Reliable Software Technologies
HW/SW codesign techniques for dynamically reconfigurable architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware/software partitioning of software binaries
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Large exploration for HW/SW partitioning of multirate and aperiodic real-time systems
Proceedings of the tenth international symposium on Hardware/software codesign
Dynamic hardware/software partitioning: a first approach
Proceedings of the 40th annual Design Automation Conference
Algorithm and architecture-level design space exploration using hierarchical data flows
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
On the hardware-software partitioning problem: System modeling and partitioning techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Architectural Considerations for Application-Specific Counterflow Pipelines
ARVLSI '99 Proceedings of the 20th Anniversary Conference on Advanced Research in VLSI
SLIF: a specification-level intermediate format for system design
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Model Refinement for Hardware-Software Codesign
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Procedure cloning: a transformation for improved system-level functional partitioning
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Process Partitioning for Distributed Embedded Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Towards a Model for Hardware and Software Functional Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Embedded Architecture Co-Synthesis and System Integration
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Fully Parallel Hardware/Software Codesign for Multi-Dimensional DSP Applications
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A Co-Design Methodology Based on Formal Specification and High-level Estimation
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A Model for the Coanalysis of Hardware and Software Architectures
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
A generic multi-unit architecture for codesign methodologies
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Interface Optimization During Hardware-Software Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Software acceleration using programmable logic: is it worth the effort?
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Modifying Min-Cut for Hardware and Software Functional Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
System level memory optimization for hardware-software co-design
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Transmutable Telecom System and Its Application
FCCM '99 Proceedings of the Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines
Industrial approach in design methodologies for mobile communications systems
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
Automatic generation of interprocess communication in the PARAGON system
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
HW/SW specification using OOM techniques
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
Performance Analysis for a Java-based Virtual Prototype
RSP '97 Proceedings of the 8th International Workshop on Rapid System Prototyping (RSP '97) Shortening the Path from Specification to Prototype
An Algorithm for Direct Synthesis of Formal Specifications
RSP '97 Proceedings of the 8th International Workshop on Rapid System Prototyping (RSP '97) Shortening the Path from Specification to Prototype
Hardware Software Partitioning Using Genetic Algorithm
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Comparison of Functional and Structural Partitioning
ISSS '96 Proceedings of the 9th international symposium on System synthesis
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Hardware/Software Partitioning with Iterative Improvement Heuristics
ISSS '96 Proceedings of the 9th international symposium on System synthesis
Hardware/Software Partitioning for Telecommunications Systems
COMPSAC '96 Proceedings of the 20th Conference on Computer Software and Applications
A methodology for control-dominated systems codesign
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
COSMOS: a codesign approach for communicating systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Towards a multi-formalism framework for architectural synthesis: the ASAR project
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Configuration-level hardware/software partitioning for real-time embedded systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
VHDL system-level specification and partitioning in a hardware/software co-synthesis environment
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Constrained software generation for hardware-software systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Design flow for hardware/software cosynthesis of a video compression system
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
A CoDesign experience with the MCSE methodology
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Design and implementation of the HiperLan/2 protocol
ACM SIGMOBILE Mobile Computing and Communications Review
Design methodology for SoC arthitectures based on reusable virtual cores
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A Practical Approach for Bus Architecture Optimization at Transaction Level
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
Verification of a Complex SoC: The PRO3 Case-Study
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe: Designers' Forum - Volume 2
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Application of Binary Translation to Java Reconfigurable Architectures
IPDPS '05 Proceedings of the 19th IEEE International Parallel and Distributed Processing Symposium (IPDPS'05) - Workshop 3 - Volume 04
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
A Simulation and Exploration Technology for Multimedia-Application-Driven Architectures
Journal of VLSI Signal Processing Systems
Exploiting Java through binary translation for low power embedded reconfigurable systems
SBCCI '05 Proceedings of the 18th annual symposium on Integrated circuits and system design
Profiling soft-core processor applications for hardware/software partitioning
Journal of Systems Architecture: the EUROMICRO Journal
Synthesis for SoC architecture using VCores
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Software thread integration for embedded system display applications
ACM Transactions on Embedded Computing Systems (TECS)
Low-complex dynamic programming algorithm for hardware/software partitioning
Information Processing Letters
System level design paradigms: Platform-based design and communication synthesis
Proceedings of the 41st annual Design Automation Conference
Algorithmic aspects of area-efficient hardware/software partitioning
The Journal of Supercomputing
Hierarchical decomposition algorithm for hardware/software partitioning
Proceedings of the 44th annual Southeast regional conference
System-level performance/power analysis for platform-based design of multimedia applications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
An efficient list scheduling algorithm for time placement problem
Computers and Electrical Engineering
Advanced hardware/software co-design on reconfigurable network-on-chip based hyper-platforms
Computers and Electrical Engineering
PeaCE: A hardware-software codesign environment for multimedia embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Two-level microprocessor-accelerator partitioning
Proceedings of the conference on Design, automation and test in Europe
Clock-frequency assignment for multiple clock domain systems-on-a-chip
Proceedings of the conference on Design, automation and test in Europe
Partitioning of Hardware-Software Embedded Systems: A Metrics-based Approach
Integrated Computer-Aided Engineering
Hardware/Software Co-Design Methodology for Design of Embedded Systems
Integrated Computer-Aided Engineering
Finding optimal hardware/software partitions
Formal Methods in System Design
A novel SoC design methodology combining adaptive software and reconfigurable hardware
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Quality-driven model-based architecture synthesis for real-time embedded SoCs
Journal of Systems Architecture: the EUROMICRO Journal
Algorithmic aspects for power-efficient hardware/software partitioning
Mathematics and Computers in Simulation
New model and algorithm for hardware/software partitioning
Journal of Computer Science and Technology
A scalable synthesis methodology for application-specific processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient memory management for hardware accelerated Java Virtual Machines
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A systematic approach to profiling for hardware/software partitioning
Computers and Electrical Engineering
A system level implementation strategy and partitioning heuristic for LUT-based applications
Computers and Electrical Engineering
Multi-layer bus minimization for SoC
Journal of Systems and Software
A BBN-based framework for adaptive IP-reuse
Proceedings of the 6th FPGAworld Conference
Low-complex dynamic programming algorithm for hardware/software partitioning
Information Processing Letters
Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning
International Journal of Applied Mathematics and Computer Science
International Journal of Reconfigurable Computing - Special issue on selected papers from ReConFig 2008
Concept-based partitioning for large multidomain multifunctional embedded systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
What is hardware/software partitioning?
ACM SIGDA Newsletter
Towards an application of model-based codesign: an autonomous, intelligent cruise controller
ECBS'97 Proceedings of the 1997 international conference on Engineering of computer-based systems
Application of ESL synthesis on GSM edge algorithm for base station
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
ICONIP'06 Proceedings of the 13th international conference on Neural information processing - Volume Part III
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A technical assessment of soc methodologies and requirements for a full-blown methodology
ICCSA'06 Proceedings of the 2006 international conference on Computational Science and Its Applications - Volume Part II
EUC'06 Proceedings of the 2006 international conference on Emerging Directions in Embedded and Ubiquitous Computing
Hardware and software synthesis of heterogeneous systems from dataflow programs
Journal of Electrical and Computer Engineering - Special issue on ESL Design Methodology
Efficient heuristic algorithms for path-based hardware/software partitioning
Mathematical and Computer Modelling: An International Journal
Tool support for hardware/software co-design of communication protocols
Computer Communications
Robust Software Partitioning with Multiple Instantiation
INFORMS Journal on Computing
Journal of Real-Time Image Processing
Hi-index | 0.00 |
As system design grows increasingly complex, the use of predesigned components, such as general-purpose microprocessors can simplify synthesized hardware. While the problems in designing systems that contain processors and application-specific integrated circuit chips are not new, computer-aided synthesis of such heterogeneous or mixed systems poses unique problems. The authors demonstrate the feasibility of synthesizing heterogeneous systems by using timing constraints to delegate tasks between hardware and software so that performance requirements can be met. System functionality is captured using the HardwareC hardware description language. The synthesis of an Ethernet-based network coprocessor is discussed as an example.