System-level synthesis of low-power hard real-time systems

Authors:
Darko Kirovski;Miodrag Potkonjak
Affiliations:
Computer Science Department, University of California, Los Angeles, CA;Computer Science Department, University of California, Los Angeles, CA
Venue:
DAC '97 Proceedings of the 34th annual Design Automation Conference
Year:
1997

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Abstract

We present a system-level approach for power optimization undera set of user specified costs and timing constraints of hard real-timedesigns. The approach optimizes all three degrees of freedom forpower minimization, namely switching activity, effective capacityand voltage supply.We first define two key associated optimization problems, processorallocation and task assignment, and establish their computationalcomplexity. Efficient algorithms are developed for bothsystem design problems. The statistical analysis of comprehensiveexperimental results and their comparison with the developed conservativeand optimistic sharp lower bounds, clearly indicates thequality of the proposed optimization techniques.