Using types to avoid redundant specialization
PEPM '91 Proceedings of the 1991 ACM SIGPLAN symposium on Partial evaluation and semantics-based program manipulation
Fast text searching: allowing errors
Communications of the ACM
Procedure exlining: a transformation for improved system and behavioral synthesis
ISSS '95 Proceedings of the 8th international symposium on System synthesis
An architectural co-synthesis algorithm for distributed, embedded computing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A hardware/software partitioner using a dynamically determined granularity
DAC '97 Proceedings of the 34th annual Design Automation Conference
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Procedure cloning: a transformation for improved system-level functional partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FSMD functional partitioning for low power
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A low power hardware/software partitioning approach for core-based embedded systems
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A comparative study of static and profile-based heuristics for inlining
DYNAMO '00 Proceedings of the ACM SIGPLAN workshop on Dynamic and adaptive compilation and optimization
The Garp Architecture and C Compiler
Computer
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Partitioning and Exploration Strategies in the TOSCA Co-Design Flow
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Hardware/Software Partitioning with Iterative Improvement Heuristics
ISSS '96 Proceedings of the 9th international symposium on System synthesis
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Techniques for minimizing and balancing I/O during functional partitioning
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis
Proceedings of the 17th ACM Great Lakes symposium on VLSI
Finding optimal hardware/software partitions
Formal Methods in System Design
Function Call Optimization for Efficient Behavioral Synthesis
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Function-Level Partitioning of Sequential Programs for Efficient Behavioral Synthesis
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Partitioning of code for a massively parallel machine
Partitioning of code for a massively parallel machine
A polynomial algorithm for partitioning problems
ACM Transactions on Embedded Computing Systems (TECS)
Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning
International Journal of Applied Mathematics and Computer Science
ICA3PP'12 Proceedings of the 12th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
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Many computer-aided design problems involve solutions that require the partitioning of a large sequential program written in a language such as C or VHDL. Such partitioning can improve design metrics such as performance, power, energy, size, input/output lines, and even CAD tool run-time and memory requirements, by partitioning among hardware modules, hardware and software processors, or even among time-slices in reconfigurable computing devices. Previous partitioning approaches typically preselect the granularity at which the program is partitioned. In this article, we define three distinct partitioning steps: procedure determination, preclustering, and N-way partitioning, with the first two steps focusing on granularity selection. Using three steps instead of one can provide for a more thorough design space exploration and for faster partitioning. We emphasize the first two steps in this article since they represent the most novel aspects. We illustrate the approach on an example, provide results of several experiments, and point to the need for future research that more fully automates the three-step approach.