Partitioning and Exploration Strategies in the TOSCA Co-Design Flow

Authors:
A. Balboni;W. Fornaciari;D. Sciuto
Affiliations:
ITALTEL-SIT, Central Research Labs, CLTE, 20019 Castelletto di Settimo Milanese (MI), Italy;CEFRIEL, via Emanueli 15, 20126 Milano, Italy and Politecnico di Milano, Dip. Elettronica e Informazione, P.zza L. Da Vinci 32, Milano, Italy;Politecnico di Milano, Dip. Elettronica e Informazione, P.zza L. Da Vinci 32, Milano, Italy
Venue:
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Year:
1996

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Abstract

The TOSCA environment for hardware/software co-design of control dominated systems implemented on a single chip includes a novel approach to the system exploration phase for the evaluation of alternative architectures. The paper presents the metrics and the partitioning algorithm defined for the identification of the best hardware and software bindings and modularization, given the design constraints and goals. The system exploration phase is implemented as an iterative process directed by the user, based on the formal internal design representation adopted in TOSCA. The application of the metrics is then shown on a simple example to illustrate the approach.