Dynamic hardware/software partitioning: a first approach

Authors:
Greg Stitt;Roman Lysecky;Frank Vahid
Affiliations:
University of California, Riverside;University of California, Riverside;University of California, Riverside
Venue:
Proceedings of the 40th annual Design Automation Conference
Year:
2003

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Abstract

Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy consumption in embedded systems. Meanwhile, dynamic software optimization methods have shown the usefulness and feasibility of runtime program optimization, but those optimizations do not achieve as much as partitioning. We introduce a first approach to dynamic hardware/software partitioning. We describe our system architecture and initial on-chip tools, including profiler, decompiler, synthesis, and placement and routing tools for a simplified configurable logic fabric, able to perform dynamic partitioning of real benchmarks. We show speedups averaging 2.6 for five benchmarks taken from Powerstone, NetBench, and our own benchmarks.