Genetic algorithms for hardware-software partitioning and optimal resource allocation

  • Authors:

  • Madhura Purnaprajna;Marek Reformat;Witold Pedrycz

  • Affiliations:

  • Department of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada T6G2V4;Department of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada T6G2V4;Department of Electrical and Computer Engineering, University of Alberta, Edmonton, Alberta, Canada T6G2V4

  • Venue:
  • Journal of Systems Architecture: the EUROMICRO Journal
  • Year:
  • 2007

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Abstract

A scheme for time and power efficient embedded system design, using hardware and software components, is presented. Our objective is to reduce the execution time and the power consumed by the system, leading to the simultaneous multi-objective minimization of time and power. The goal of suitably partitioning the system into hardware and software components is achieved using Genetic Algorithms (GA). Multiple tests were conducted to confirm the consistency of the results obtained and the versatile nature of the objective functions. An enhanced resource constrained scheduling algorithm is used to determine the system performance. To emulate the characteristics of practical systems, the influence of inter-processor communication is examined. The suitability of introducing a reconfigurable hardware resource over pre-configured hardware is explored for the same objectives. The distinct difference in the task to resource mapping with the variation in design objective is studied. Further, the procedure to allocate optimal number of resources based on the design objective is proposed. The implementation is constrained for power and time individually, with GA being used to arrive at the resource count to suit the objective. The results obtained are compared by varying the time and power constraints. The test environment is developed using randomly generated task graphs. Exhaustive sets of tests are performed on the set design objectives to validate the proposed solution.