COSYN: hardware-software co-synthesis of embedded systems
DAC '97 Proceedings of the 34th annual Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
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CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
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VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Hardware-software co-synthesis of distributed embedded systems
Hardware-software co-synthesis of distributed embedded systems
Configuration-level hardware/software partitioning for real-time embedded systems
CODES '94 Proceedings of the 3rd international workshop on Hardware/software co-design
Proceedings of the 6th international workshop on Hardware/software codesign
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
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DATE '99 Proceedings of the conference on Design, automation and test in Europe
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Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
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ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Journal of Systems Architecture: the EUROMICRO Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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EURASIP Journal on Embedded Systems - Reconfigurable Computing and Hardware/Software Codesign
International Journal of Computer Applications in Technology
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ACM Transactions on Embedded Computing Systems (TECS)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PM-COSYN: PE and memory co-synthesis for MPSoCs
Proceedings of the Conference on Design, Automation and Test in Europe
Pipelined data parallel task mapping/scheduling technique for MPSoC
Proceedings of the Conference on Design, Automation and Test in Europe
ScatterD: Spatial deployment optimization with hybrid heuristic/evolutionary algorithms
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
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SAMOS'06 Proceedings of the 6th international conference on Embedded Computer Systems: architectures, Modeling, and Simulation
Robust Software Partitioning with Multiple Instantiation
INFORMS Journal on Computing
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In this paper, we present a hardware-software co-synthesis system, called MOGAC, that partitions and schedules embedded system specifications consisting of multiple periodic task graphs. MOGAC synthesizes real-time heterogeneous distributed architectures using an adaptive multiobjective genetic algorithm that can escape local minima. Price and power consumption are optimized while hard real-time constraints are met. MOGAC places no limit on the number of hardware or software processing elements in the architectures it synthesizes. Our general model for bus and point-to-point communication links allows a number of link types to be used in an architecture. Application-specific integrated circuits consisting of multiple processing elements are modeled. Heuristics are used to tackle multi-rate systems, as well as systems containing task graphs whose hyperperiods are large relative to their periods. The application of a multiobjective optimization strategy allows a single co-synthesis run to produce multiple designs which trade off different architectural features. Experimental results indicate that MOGAC has advantages over previous work in terms of solution quality and running time.