Scheduling precedence graphs in systems with interprocessor communication times
SIAM Journal on Computing
IEEE Transactions on Parallel and Distributed Systems
MOGAC: a multiobjective genetic algorithm for the co-synthesis of hardware-software embedded systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Characterization and Theoretical Comparison of Branch-and-Bound Algorithms for Permutation Problems
Journal of the ACM (JACM)
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the ninth international symposium on Hardware/software codesign
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Readings in Hardware/Software Co-Design
Readings in Hardware/Software Co-Design
Readings in hardware/software co-design
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
Algorithmics for Hard Problems
Algorithmics for Hard Problems
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
IEEE Transactions on Parallel and Distributed Systems
A multiplier generator for Xilinx FPGAs
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Rapid prototyping for wireless designs: the five-ones approach
Signal Processing - From signal processing theory to implementation
A coupled hardware and software architecture for programmable digital signal processors (synchronous data flow)
System-level codesign of mixed hardware-software systems
System-level codesign of mixed hardware-software systems
System-Level Performance Analysis in SystemC
Proceedings of the conference on Design, automation and test in Europe - Volume 1
An area estimation methodology for FPGA based designs at systemc-level
Proceedings of the 41st annual Design Automation Conference
Multi-Granularity Metrics for the Era of Strongly Personalized SOCs
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Embedded System Design
A dynamically constrained genetic algorithm for hardware-software partitioning
Proceedings of the 8th annual conference on Genetic and evolutionary computation
A consistent design methodology for wireless embedded systems
EURASIP Journal on Applied Signal Processing
Efficient design methods for embedded communication systems
EURASIP Journal on Embedded Systems
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The research field of system partitioning in modern electronic system design started to find strong advertence of scientists about fifteen years ago. Since a multitude of formulations for the partitioning problem exist, the same multitude could be found in the number of strategies that address this problem. Their feasibility is highly dependent on the platform abstraction and the degree of realism that it features. This work originated from the intention to identify the most mature and powerful approaches for system partitioning in order to integrate them into a consistent design framework for wireless embedded systems. Within this publication, a thorough characterisation of graph properties typical for task graphs in the field of wireless embedded system design has been undertaken and has led to the development of an entirely new approach for the system partitioning problem. The restricted range exhaustive search algorithm is introduced and compared to popular and well-reputed heuristic techniques based on tabu search, genetic algorithm, and the global criticality/local phase algorithm. It proves superior performance for a set of system graphs featuring specific properties found in human-made task graphs, since it exploits their typical characteristics such as locality, sparsity, and their degree of parallelism.