Algorithms
Hardware-software co-design of embedded systems: the POLIS approach
Hardware-software co-design of embedded systems: the POLIS approach
A framework for fast hardware-software co-simulation
Proceedings of the conference on Design, automation and test in Europe
System Design with SystemC
SQL: The Complete Reference
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Garp: a MIPS processor with a reconfigurable coprocessor
FCCM '97 Proceedings of the 5th IEEE Symposium on FPGA-Based Custom Computing Machines
An Examination of DSLs for Concisely Representing Model Traversals and Transformations
HICSS '03 Proceedings of the 36th Annual Hawaii International Conference on System Sciences (HICSS'03) - Track 9 - Volume 9
Efficient Modeling of Preemption in a Virtual Prototype
RSP '00 Proceedings of the 11th IEEE International Workshop on Rapid System Prototyping (RSP 2000)
SPARK: A High-Lev l Synthesis Framework For Applying Parallelizing Compiler Transformations
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Rapid prototyping for wireless designs: the five-ones approach
Signal Processing - From signal processing theory to implementation
The formal semantics of SDL-2000: status and perspectives
Computer Networks: The International Journal of Computer and Telecommunications Networking - ITU-T system design languages (SDL)
Design and DSP implementation of fixed-point systems
EURASIP Journal on Applied Signal Processing
Efficient design methods for embedded communication systems
EURASIP Journal on Embedded Systems
A fully automated environment for verification of virtual prototypes
EURASIP Journal on Applied Signal Processing
RRES: a novel approach to the partitioning problem for a typical subset of system graphs
EURASIP Journal on Embedded Systems - Reconfigurable Computing and Hardware/Software Codesign
Evaluation and exploration of RFID systems by rapid prototyping
Personal and Ubiquitous Computing
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Complexity demand of modern communication systems, particularly in the wireless domain, grows at an astounding rate, a rate so high that the available complexity and even worse the design productivity required to convert algorithms into silicon are left far behind. This effect is commonly referred to as the design productivity crisis or simply the design gap. Since the design gap is predicted to widen every year, it is of utmost importance to look closer at the design flow of such communication systems in order to find improvements. While various ideas for speeding up designs have been proposed, very few have found their path into existing EDA products. This paper presents requirements for such tools and shows how an open design environment offers a solution to integrate existing EDA tools, allowing for a consistent design flow, considerably speeding up design times.