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PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation
Adaptation in natural and artificial systems
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High-level synthesis: introduction to chip and system design
High-level synthesis: introduction to chip and system design
Distributed design-space exploration for high-level synthesis systems
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Heuristics for branch-and-bound global allocation
EURO-DAC '92 Proceedings of the conference on European design automation
Computer
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Genetic algorithms for partitioning, placement, and layer assignment for multichip modules
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A solution methodology for exact design space exploration in a three-dimensional design space
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Genetic Algorithms in Search, Optimization and Machine Learning
Synthesis and Optimization of Digital Circuits
Synthesis and Optimization of Digital Circuits
A Model and Methodology for Hardware-Software Codesign
IEEE Design & Test
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
Computer-Aided Hardware-Software Codesign
IEEE Micro
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ESOP '88 Proceedings of the 2nd European Symposium on Programming
Process Partitioning for Distributed Embedded Systems
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Toward a Practical Methodology for Completely Characterizing the Optimal Design Space
ISSS '96 Proceedings of the 9th international symposium on System synthesis
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DATE '00 Proceedings of the conference on Design, automation and test in Europe
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Applied Intelligence
On the hardware-software partitioning problem: System modeling and partitioning techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FCCM '00 Proceedings of the 2000 IEEE Symposium on Field-Programmable Custom Computing Machines
Functional Partitioning for Low Power Distributed Systems of Systems-on-a-chip
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Modeling and optimizing run-time reconfiguration using evolutionary computation
ACM Transactions on Embedded Computing Systems (TECS)
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ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Integration, the VLSI Journal
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Proceedings of the conference on Design, automation and test in Europe: Proceedings
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The Journal of Supercomputing
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Proceedings of the 17th ACM Great Lakes symposium on VLSI
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Journal of Systems Architecture: the EUROMICRO Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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Formal Methods in System Design
C is for circuits: capturing FPGA circuits as sequential code for portability
Proceedings of the 16th international ACM/SIGDA symposium on Field programmable gate arrays
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Proceedings of the 18th ACM Great Lakes symposium on VLSI
RRES: a novel approach to the partitioning problem for a typical subset of system graphs
EURASIP Journal on Embedded Systems - Reconfigurable Computing and Hardware/Software Codesign
Algorithmic aspects for power-efficient hardware/software partitioning
Mathematics and Computers in Simulation
New model and algorithm for hardware/software partitioning
Journal of Computer Science and Technology
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Proceedings of the 6th FPGAworld Conference
A polynomial algorithm for partitioning problems
ACM Transactions on Embedded Computing Systems (TECS)
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International Journal of Applied Mathematics and Computer Science
Server-side coprocessor updating for mobile devices with FPGAs
Proceedings of the 18th annual ACM/SIGDA international symposium on Field programmable gate arrays
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ACSAC'05 Proceedings of the 10th Asia-Pacific conference on Advances in Computer Systems Architecture
Efficient heuristic algorithms for path-based hardware/software partitioning
Mathematical and Computer Modelling: An International Journal
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This paper presents an integrated approach to hardware software partitioning and hardware design space exploration. We propose a genetic algorithm which performs hardware software partitioning on a task graph while simultaneously contemplating various design alternatives for tasks mapped to hardware. We primarily deal with data dominated designs typically found in digital signal processing and image processing applications. A detailed description of various genetic operators is presented. We provide results to illustrate the effectiveness of our integrated methodology.