The combination of scheduling, allocation, and mapping in a single algorithm
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Tutorial on high-level synthesis
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
MAHA: a program for datapath synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
From Behavior to Structure: High-Level Synthesis
IEEE Design & Test
DSS: A Distributed High-Level Synthesis System
IEEE Design & Test
Experiences in functional validation of a high level synthesis system
DAC '93 Proceedings of the 30th international Design Automation Conference
Hierarchical behavioral partitioning for multicomponent synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
POSE: a parallel object-oriented synthesis environment
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Automated Correctness Condition Generation for Formal Verification ofSynthesized RTL Designs
Formal Methods in System Design - Special issue on formal methods for computer-added design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
DSS: A Distributed High-Level Synthesis System
IEEE Design & Test
Profile-Driven Behavioral Synthesis for Low-Power VLSI Systems
IEEE Design & Test
A Hierarchical Register Optimization Algorithm for Behavioral Synthesis
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Design space exploration using time and resource duality with the ant colony optimization
Proceedings of the 43rd annual Design Automation Conference
A PN-based approach to the high-level synthesis of digital systems
Integration, the VLSI Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A PN-based approach to the high-level synthesis of digital systems
Integration, the VLSI Journal
Compiler-in-the-loop exploration during datapath synthesis for higher quality delay-area trade-offs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on adaptive power management for energy and temperature-aware computing systems
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