Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Object-oriented modeling and design
Object-oriented modeling and design
Distributed design-space exploration for high-level synthesis systems
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
PSM: an object-oriented synthesis approach to multiprocessor system design
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Petri Nets Modeling in Pipelined Microprocessor Design
Proceedings of the 14th International Conference on Application and Theory of Petri Nets
On the architecture of a CAD framework: the NELSIS approach
EURO-DAC '90 Proceedings of the conference on European design automation
Synthesis for SoC architecture using VCores
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Requirements specification and analysis of digital systems usingfuzzy and marked Petri nets
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
Correctness in hierarchical knowledge-based requirements
IEEE Transactions on Systems, Man, and Cybernetics, Part B: Cybernetics
Requirements specification and analysis of fault-tolerant digital systems
IEEE Transactions on Systems, Man, and Cybernetics, Part A: Systems and Humans
Hierarchical design space exploration for a class of digital systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automated design tool execution in the Ulysses design environment
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Auto-design systematic methodology of cluster MPSoC for multiple concurrent applications
International Journal of Computer Applications in Technology
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A Petri net (PN)-based approach associated with object-oriented technique is proposed to support the specification, analysis, and design of digital systems. Starting from system level to register-transfer level (RTL), the marked Petri net (MPN) with colored tokens is well applied to capture the designer's ideas and to present the system's behavior graphically. Through the net model, reachability analysis technique is employed to formally verify the digital system designed. Hence, using the behavioral properties-liveness (i.e. absence of deadlock) and safety (i.e. absence of overflow) of the net model can avoid the hardware system from deadlocks and hazards, respectively. From the live and safe MPN model we can obtain the desired hardware prototype at RTL by using the system optimization rules and object-oriented model checking. Furthermore, a time Petri net (TPN) model can be used to check the time consistency among events. This PN-based modeling approach is superior to the current techniques for requirements analysis. Finally, main results are presented in the form of four properties and supported by some experiments.