Theory of linear and integer programming
Theory of linear and integer programming
A method for partitioning UNITY language in hardware and software
EURO-DAC '94 Proceedings of the conference on European design automation
Hardware/software partitioning and minimizing memory interface traffic
EURO-DAC '94 Proceedings of the conference on European design automation
Multiple-process behavioral synthesis for mixed hardware-software systems
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Clustering for improved system-level functional partitioning
ISSS '95 Proceedings of the 8th international symposium on System synthesis
Profiling in the ASP codesign environment
ISSS '95 Proceedings of the 8th international symposium on System synthesis
A hardware/software partitioning algorithm for designing pipelined ASIPs with least gate counts
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Hardware/software partitioning of VHDL system specifications
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
An architectural co-synthesis algorithm for distributed, embedded computing systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
FSMD functional partitioning for low power
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Period-Based Load Partitioning and Assignment for Large Real-Time Applications
IEEE Transactions on Computers
Constraint-driven system partitioning
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Hardware resource allocation for hardware/software partitioning in the LYCOS system
Proceedings of the conference on Design, automation and test in Europe
Hardware/software partitioning with integrated hardware design space exploration
Proceedings of the conference on Design, automation and test in Europe
A knowledge-based system for hardware-software partitioning
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the ninth international symposium on Hardware/software codesign
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Hardware/Software CO-Design for Data Flow Dominated Embedded Systems
Hardware/Software CO-Design for Data Flow Dominated Embedded Systems
Partitioning sequential programs for CAD using a three-step approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Hardware-Software Cosynthesis for Digital Systems
IEEE Design & Test
Hardware-Software Cosynthesis for Microcontrollers
IEEE Design & Test
A Fast and Robust Network Bisection Algorithm
IEEE Transactions on Computers
Constructive Disjunction Revisited
KI '96 Proceedings of the 20th Annual German Conference on Artificial Intelligence: Advances in Artificial Intelligence
Dynamic hardware/software partitioning: a first approach
Proceedings of the 40th annual Design Automation Conference
On the hardware-software partitioning problem: System modeling and partitioning techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
PACE: A Dynamic Programming Algorithm for Hardware/Software Partitioning
CODES '96 Proceedings of the 4th International Workshop on Hardware/Software Co-Design
Modifying Min-Cut for Hardware and Software Functional Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
Preference-Driven Hierarchical Hardware/Software Partitioning
ICCD '99 Proceedings of the 1999 IEEE International Conference on Computer Design
System-level codesign of mixed hardware-software systems
System-level codesign of mixed hardware-software systems
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
MiBench: A free, commercially representative embedded benchmark suite
WWC '01 Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop
Two novel multiway circuit partitioning algorithms using relaxed locking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hardware/software partitioning for multifunction systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning
International Journal of Applied Mathematics and Computer Science
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Most previous approaches to hardware/software partitioning considered heuristic solutions. In contrast, this paper presents an exact algorithm for the problem based on branch-and-bound. Several techniques are investigated to speed up the algorithm, including bounds based on linear programming, a custom inference engine to make the most out of the inferred information, advanced necessary conditions for partial solutions, and different heuristics to obtain high-quality initial solutions. It is demonstrated with empirical measurements that the resulting algorithm can solve highly complex partitioning problems in reasonable time. Moreover, it is about ten times faster than a previous exact algorithm based on integer linear programming. The presented methods can also be useful in other related optimization problems.