Multilevel cooperative search: application to the circuit/hypergraph partitioning problem
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Design and implementation of move-based heuristics for VLSI hypergraph partitioning
Journal of Experimental Algorithmics (JEA)
Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning
ALENEX '99 Selected papers from the International Workshop on Algorithm Engineering and Experimentation
An Evaluation of Move-Based Multi-Way Partitioning Algorithms
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Iterative-improvement-based declustering heuristics for multi-disk databases
Information Systems
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
IEEE Transactions on Parallel and Distributed Systems
Finding optimal hardware/software partitions
Formal Methods in System Design
Multi-level direct K-way hypergraph partitioning with multiple constraints and fixed vertices
Journal of Parallel and Distributed Computing
Expert Systems with Applications: An International Journal
Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning
International Journal of Applied Mathematics and Computer Science
Efficient successor retrieval operations for aggregate query processing on clustered road networks
Information Sciences: an International Journal
Dynamic partitioning of IP-based wireless access networks
Computer Networks: The International Journal of Computer and Telecommunications Networking
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All the previous Kernighan-Lin-based (KL-based) circuit partitioning algorithms employ the locking mechanism, which enforces each cell to move exactly once per pass. In this paper, we propose two novel approaches for multiway circuit partitioning to overcome this limitation. Our approaches allow each cell to move more than once. Our first approach still uses the locking mechanism but in a relaxed way. It introduces the phase concept such that each pass can include more than one phase, and a phase can include at most one move of each cell. Our second approach does not use the locking mechanism at all. It introduces the mobility concept such that each cell can move as freely as allowed by its mobility. Each approach leads to KL-based generic algorithms whose parameters can be set to obtain algorithms with different performance characteristics. We generated three versions of each generic algorithm and evaluated them on a subset of common benchmark circuits in comparison with Sanchis' algorithm (FMS) and the simulated annealing algorithm (SA). Experimental results show that our algorithms are efficient, they outperform FMS significantly, and they perform comparably to SA. Our algorithms perform relatively better as the number of parts in the partition increases as well as the density of the circuit decreases. This paper also provides guidelines for good parameter settings for the generic algorithms