Multiple-Way Network Partitioning
IEEE Transactions on Computers
A parallel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design
DAC '93 Proceedings of the 30th international Design Automation Conference
The ISPD98 circuit benchmark suite
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Multilevel hypergraph partitioning: applications in VLSI domain
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Multilevel k-way hypergraph partitioning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hypergraph partitioning with fixed vertices
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Two novel multiway circuit partitioning algorithms using relaxed locking
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cooperative Parallel Tabu Search for Capacitated Network Design
Journal of Heuristics
A first multilevel cooperative algorithm for capacitated multicommodity network design
Computers and Operations Research - Anniversary focused issue of computers & operations research on tabu search
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