Efficient placement and routing techniques for master slice LSI
DAC '80 Proceedings of the 17th Design Automation Conference
A proper model for the partitioning of electrical circuits
DAC '72 Proceedings of the 9th Design Automation Workshop
A class of min-cut placement algorithms
DAC '77 Proceedings of the 14th Design Automation Conference
Constructing test cases for partitioning heuristics
IEEE Transactions on Computers
Abstract routing of logic networks for custom module generation
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
An intelligent compiler subsystem for a silicon compiler
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Task allocation onto a hypercube by recursive mincut bipartitioning
C3P Proceedings of the third conference on Hypercube concurrent computers and applications: Architecture, software, computer systems, and general issues - Volume 1
25 years of DAC Papers on Twenty-five years of electronic design automation
Multiple-Way Network Partitioning
IEEE Transactions on Computers
A graph partitioning algorithm by node separators
ACM Transactions on Mathematical Software (TOMS)
LASSIE: structure to layout for behavioral synthesis tools
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
ORCA a sea-of-gates place and route system
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Automatic synthesis of Boolean equations using programmable array logic
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
An investigation into statistical properties of partitioning and floorplanning problems
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A neural network design for circuit partitioning
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Efficient final placement based on nets-as-points
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
An evolution-based approach to partitioning ASIC systems
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Min-cost partitioning on a tree structure and applications
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
VLSI cell placement techniques
ACM Computing Surveys (CSUR)
Performance-driven system partitioning on multi-chip modules
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Net partitions yield better module partitions
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Combining Logic Minimization and Folding for PLAs
IEEE Transactions on Computers
Generalization of Min-Cut Partitioning to Tree Structures and its Applications
IEEE Transactions on Computers
A performance driven macro-cell placement algorithm
DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
Stochastic evolution: a fast effective heuristic for some generic layout problems
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A new simultaneous circuit partitioning and chip placement approach based on simulated annealing
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A transistor reordering technique for gate matrix layout
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A general purpose multiple way partitioning algorithm
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Flexible transistor matrix (FTM)
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Fast and near optimal scheduling in automatic data path synthesis
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Partitioned register files for VLIWs: a preliminary analysis of tradeoffs
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
On a parallel partitioning technique for use with conservative parallel simulation
PADS '93 Proceedings of the seventh workshop on Parallel and distributed simulation
Corolla partitioning for distributed logic simulation of VLSI-circuits
PADS '93 Proceedings of the seventh workshop on Parallel and distributed simulation
Communication based logic partitioning
EURO-DAC '92 Proceedings of the conference on European design automation
On the intrinsic rent parameter and spectra-based partitioning methodologies
EURO-DAC '92 Proceedings of the conference on European design automation
An efficient method of partitioning circuits for multiple-FPGA implementation.
DAC '93 Proceedings of the 30th international Design Automation Conference
Cost minimization of partitions into multiple devices
DAC '93 Proceedings of the 30th international Design Automation Conference
Geometric embeddings for faster and better multi-way netlist partitioning
DAC '93 Proceedings of the 30th international Design Automation Conference
Spectral K-way ratio-cut partitioning and clustering
DAC '93 Proceedings of the 30th international Design Automation Conference
A parallel bottom-up clustering algorithm with applications to circuit partitioning in VLSI design
DAC '93 Proceedings of the 30th international Design Automation Conference
Quadratic Boolean programming for performance-driven system partitioning
DAC '93 Proceedings of the 30th international Design Automation Conference
Multiple-Way Network Partitioning with Different Cost Functions
IEEE Transactions on Computers
Evaluating the use of pre-simulation in VLSI circuit partitioning
PADS '94 Proceedings of the eighth workshop on Parallel and distributed simulation
An evaluation system for distributed-time VHDL simulation
PADS '94 Proceedings of the eighth workshop on Parallel and distributed simulation
A static partitioning and mapping algorithm for conservative parallel simulations
PADS '94 Proceedings of the eighth workshop on Parallel and distributed simulation
Parallel logic simulation of VLSI systems
ACM Computing Surveys (CSUR)
Efficient network flow based min-cut balanced partitioning
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Multi-way VLSI circuit partitioning based on dual net representation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A general framework for vertex orderings, with applications to netlist clustering
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Delay and area optimization for compact placement by gate resizing and relocation
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Optimization of hierarchical designs using partitioning and resynthesis
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Parallel logic level simulation of VLSI circuits
WSC '94 Proceedings of the 26th conference on Winter simulation
DAC '94 Proceedings of the 31st annual Design Automation Conference
Circuit partitioning for huge logic emulation systems
DAC '94 Proceedings of the 31st annual Design Automation Conference
Performance-driven simultaneous place and route for row-based FPGAs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Partitioning very large circuits using analytical placement techniques
DAC '94 Proceedings of the 31st annual Design Automation Conference
Multi-way partitioning via spacefilling curves and dynamic programming
DAC '94 Proceedings of the 31st annual Design Automation Conference
Data flow partitioning for clock period and latency minimization
DAC '94 Proceedings of the 31st annual Design Automation Conference
A fast and stable hybrid genetic algorithm for the ratio-cut partitioning problem on hypergraphs
DAC '94 Proceedings of the 31st annual Design Automation Conference
Acyclic multi-way partitioning of Boolean networks
DAC '94 Proceedings of the 31st annual Design Automation Conference
EURO-DAC '94 Proceedings of the conference on European design automation
Distributed simulation for structural VHDL netlists
EURO-DAC '94 Proceedings of the conference on European design automation
Multi-way system partitioning into a single type or multiple types of FPGAs
FPGA '95 Proceedings of the 1995 ACM third international symposium on Field-programmable gate arrays
Parallel gate-level circuit simulation on shared memory architectures
PADS '95 Proceedings of the ninth workshop on Parallel and distributed simulation
Memory segmentation to exploit sleep mode operation
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Parallel logic simulation of VLSI systems
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Quantified suboptimality of VLSI layout heuristics
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A multilevel algorithm for partitioning graphs
Supercomputing '95 Proceedings of the 1995 ACM/IEEE conference on Supercomputing
New algorithms for min-cut replication in partitioned circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A gradient method on the initial partition of Fiduccia-Mattheyses algorithm
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Circuit partitioning with logic perturbation
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Area-speed tradeoffs for hierarchical field-programmable gate arrays
Proceedings of the 1996 ACM fourth international symposium on Field-programmable gate arrays
Min-Cut Partitioning on Underlying Tree and Graph Structures
IEEE Transactions on Computers
Effective graph clustering for path queries in digital map databases
CIKM '96 Proceedings of the fifth international conference on Information and knowledge management
BooleDozer: logic synthesis for ASICs
IBM Journal of Research and Development
Concurrency preserving partitioning (CPP) for parallel logic simulation
PADS '96 Proceedings of the tenth workshop on Parallel and distributed simulation
A probability-based approach to VLSI circuit partitioning
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Stochastic sequential machine synthesis targeting constrained sequence generation
DAC '96 Proceedings of the 33rd annual Design Automation Conference
VLSI circuit partitioning by cluster-removal using iterative improvement techniques
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Minimum replication min-cut partitioning
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
A hierarchical functional structuring and partitioning approach for multiple-FPGA implementations
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Hierarchical behavioral partitioning for multicomponent synthesis
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Fast and effective algorithms for graph partitioning and sparse-matrix ordering
IBM Journal of Research and Development - Special issue: optical lithography I
Module generation of complex macros for logic-emulation applications
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Synthesis and floorplanning for large hierarchical FPGAs
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
A Hypergraph Framework for Optimal Model-Based Decomposition ofDesign Problems
Computational Optimization and Applications
A combined hierarchical placement algorithm
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Partitioning with cone structures
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Performance-driven partitioning using retiming and replication
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
New faster Kernighan-Lin-type graph-partitioning algorithms
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Reducing the complexity of ILP formulations for synthesis
ISSS '97 Proceedings of the 10th international symposium on System synthesis
Multi-way FPGA partitioning by fully exploiting design hierarchy
DAC '97 Proceedings of the 34th annual Design Automation Conference
A hierarchy-driven FPGA partitioning method
DAC '97 Proceedings of the 34th annual Design Automation Conference
Multilevel hypergraph partitioning: application in VLSI domain
DAC '97 Proceedings of the 34th annual Design Automation Conference
Multilevel circuit partitioning
DAC '97 Proceedings of the 34th annual Design Automation Conference
DAC '97 Proceedings of the 34th annual Design Automation Conference
Partitioning around roadblocks: tackling constraints with intermediate relaxations
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Hierarchical partitioning for field-programmable systems
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Hybrid spectral/iterative partitioning
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Maintaining dynamic geometric objects on parallel processors
PRS '97 Proceedings of the IEEE symposium on Parallel rendering
Partitioning-based standard-cell global placement with an exact objective
Proceedings of the 1997 international symposium on Physical design
A multidimensional study on the feasibility of parallel switch-level circuit simulation
Proceedings of the eleventh workshop on Parallel and distributed simulation
A new approach for partitioning VLSI circuits on transistor level
Proceedings of the eleventh workshop on Parallel and distributed simulation
The ISPD98 circuit benchmark suite
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Partitioning using second-order information and stochastic-gain functions
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Futures for partitioning in physical design (tutorial)
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Circuit partitioning with complex resource constraints in FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Shared memory implementation of a parallel switch-level circuit simulator
PADS '98 Proceedings of the twelfth workshop on Parallel and distributed simulation
A new area and shape function estimation technique for VLSI layouts
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Performance of a new annealing schedule
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A quadratic metric with a simple solution scheme for initial placement
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A data structure for circuit net lists
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
The Min-cut shuffle: toward a solution for the global effect problem of Min-cut placement
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Network flow based circuit partitioning for time-multiplexed FPGAs
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
On multilevel circuit partitioning
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Multiway partitioning with pairwise movement
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Circuit partitioning for dynamically reconfigurable FPGAs
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Partitioning by iterative deletion
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Optimal partitioners and end-case placers for standard-cell layout
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Partitioning with terminals: a “new” problem and new benchmarks
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Transistor level placement for full custom datapath cell design
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Greedy, Prohibition, and Reactive Heuristics for Graph Partitioning
IEEE Transactions on Computers
IEEE Transactions on Parallel and Distributed Systems
Optimal replication for min-cut partitioning
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Synthesis of Application Specific Instructions for Embedded DSP Software
IEEE Transactions on Computers
MOCSYN: multiobjective core-based single-chip system synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
Iterative improvement based multi-way netlist partitioning for FPGAs
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A timing-driven soft-macro resynthesis method in interaction with chip floorplanning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Multilevel k-way hypergraph partitioning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hypergraph partitioning with fixed vertices
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Simultaneous circuit partitioning/clustering with retiming for performance optimization
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Effective iterative techniques for fingerprinting design IP
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hypergraph-Partitioning-Based Decomposition for Parallel Sparse-Matrix Vector Multiplication
IEEE Transactions on Parallel and Distributed Systems
Path optimization and near-greedy analysis for graph partitioning: an empirical study
Proceedings of the sixth annual ACM-SIAM symposium on Discrete algorithms
Finding near-optimal cuts: an empirical evaluation
SODA '93 Proceedings of the fourth annual ACM-SIAM Symposium on Discrete algorithms
Timing influenced layout design
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Decomposition of logic networks into silicon
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
SWAMI: a flexible logic implementation system
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Analysis of placement procedures for VLSI standard cell layout
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A parallel algorithm for mapping a special class of task graphs onto linear array multiprocessors
SAC '94 Proceedings of the 1994 ACM symposium on Applied computing
Multiway FPGA partitioning by fully exploiting design hierarchy
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Period-Based Load Partitioning and Assignment for Large Real-Time Applications
IEEE Transactions on Computers
Genetic VLSI circuit partitioning with two-dimensional geographic crossover and zigzag mapping
SAC '97 Proceedings of the 1997 ACM symposium on Applied computing
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Performance driven multi-level and multiway partitioning with retiming
Proceedings of the 37th Annual Design Automation Conference
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Cell replication and redundancy elimination during placement for cycle time optimization
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A new effective and efficient multi-level partitioning algorithm
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A new partitioning method for parallel simulation of VLSI circuits on transistor level
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Stochastic sequential machine synthesis with application to constrained sequence generation
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Dynamic Diffusion Optimization Method for Irregular Finite Element Graph Partitioning
The Journal of Supercomputing
An improved network clustering method for I/O-efficient query processing
Proceedings of the 8th ACM international symposium on Advances in geographic information systems
Runtime and quality tradeoffs in FPGA placement and routing
FPGA '01 Proceedings of the 2001 ACM/SIGDA ninth international symposium on Field programmable gate arrays
Further improve circuit partitioning using GBAW logic perturbation techniques
Proceedings of the conference on Design, automation and test in Europe
Architecture driven partitioning
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
MMP: a novel placement algorithm for combined macro block and standard cell layout design
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Feasible two-way circuit partitioning with complex resource constraints
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Performance driven multiway partitioning
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Global objectives for standard cell placement
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Circuit partitioning with coupled logic restructuring techniques
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Improved algorithms for hypergraph bipartitioning
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Multi-way partitioning using bi-partition heuristics
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Design and analysis of physical design algorithms
Proceedings of the 2001 international symposium on Physical design
Proceedings of the 2001 international symposium on Physical design
Maximum current estimation considering power gating
Proceedings of the 2001 international symposium on Physical design
Wavefront Diffusion and LMSR: Algorithms for Dynamic Repartitioning of Adaptive Meshes
IEEE Transactions on Parallel and Distributed Systems
Design and implementation of move-based heuristics for VLSI hypergraph partitioning
Journal of Experimental Algorithmics (JEA)
Cluster-aware iterative improvement techniques for partitioning large VLSI circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Design hierarchy guided multilevel circuit partitioning
Proceedings of the 2002 international symposium on Physical design
Global clustering-based performance-driven circuit partitioning
Proceedings of the 2002 international symposium on Physical design
On gate level power optimization using dual-supply voltages
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Meshed atlases for real-time procedural solid texturing
ACM Transactions on Graphics (TOG)
Multilevel algorithms for multi-constraint graph partitioning
SC '98 Proceedings of the 1998 ACM/IEEE conference on Supercomputing
Layout-aware synthesis of arithmetic circuits
Proceedings of the 39th annual Design Automation Conference
Graph-partitioning based instruction scheduling for clustered processors
Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture
Automated design synthesis and partitioning for adaptive reconfigurable hardware
Hardware implementation of intelligent systems
A parallel iterative linear solver for solving irregular grid semiconductor device matrices
Proceedings of the 1994 ACM/IEEE conference on Supercomputing
Mongrel: hybrid techniques for standard cell placement
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Effective partition-driven placement with simultaneous level processing and global net views
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Performance-driven placement for dynamically reconfigurable FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Transistor placement for noncomplementary digital VLSI cell synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
A Mixed Heuristic for Circuit Partitioning
Computational Optimization and Applications
AnyBoard: An FPGA-Based, Reconfigurable System
IEEE Design & Test
A Fast Partitioning Method for PLA-Based FPGAs
IEEE Design & Test
Integrating HDL Synthesis and Partitioning for Multi-FPGA Designs
IEEE Design & Test
IEEE Micro
Two Complementary Approaches for Microcode Bit Optimization
IEEE Transactions on Computers
A Fast and Robust Network Bisection Algorithm
IEEE Transactions on Computers
Genetic Algorithm and Graph Partitioning
IEEE Transactions on Computers
A Parallelization Domain Oriented Multilevel Graph Partitioner
IEEE Transactions on Computers
CCAM: A Connectivity-Clustered Access Method for Networks and Network Computations
IEEE Transactions on Knowledge and Data Engineering
Using Automatic Process Clustering for Design Recovery and Distributed Debugging
IEEE Transactions on Software Engineering
An adaptive partitioning algorithm for distributed discrete event simulation systems
Journal of Parallel and Distributed Computing - Problems in parallel and distributed computing: Solutions based on evolutionary paradigms
Proceedings of the 2003 international workshop on System-level interconnect prediction
Partition-driven standard cell thermal placement
Proceedings of the 2003 international symposium on Physical design
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Proceedings of the 2003 international symposium on Physical design
Optimality, scalability and stability study of partitioning and placement algorithms
Proceedings of the 2003 international symposium on Physical design
Benchmarking for large-scale placement and beyond
Proceedings of the 2003 international symposium on Physical design
Load balancing for unstructured mesh applications
Progress in computer research
Domain Decomposition Coupled with Delaunay Mesh Generation
ICCS '02 Proceedings of the International Conference on Computational Science-Part I
Dynamic Iterative Method for Fast Network Partitioning
HPCN Europe 2000 Proceedings of the 8th International Conference on High-Performance Computing and Networking
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
An Integrated Decomposition and Partitioning Approach for Irregular Block-Structured Applications
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
A Local Refinement Algorithm for Data Partitioning
PARA '00 Proceedings of the 5th International Workshop on Applied Parallel Computing, New Paradigms for HPC in Industry and Academia
An Empirical Comparison of Decomposition Algorithms for Complex Finite Element Meshes
PPAM '01 Proceedings of the th International Conference on Parallel Processing and Applied Mathematics-Revised Papers
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning
Proceedings of the 2002 International Conference on Parallel Architectures and Compilation Techniques
Ordering Unsymmetric Matrices into Bordered Block Diagonal Form for Parallel Processing
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Min-Cut Methods for Mapping Dataflow Graphs
Euro-Par '99 Proceedings of the 5th International Euro-Par Conference on Parallel Processing
Using Combinatorial Optimization Methods for Quantification Scheduling
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Design and Implementation of the Fiduccia-Mattheyses Heuristic for VLSI Netlist Partitioning
ALENEX '99 Selected papers from the International Workshop on Algorithm Engineering and Experimentation
Transistor Level Synthesis Dedicated to Fast I.P. Prototyping
PATMOS '02 Proceedings of the 12th International Workshop on Integrated Circuit Design. Power and Timing Modeling, Optimization and Simulation
Structural Methods to Improve the Symbolic Analysis of Petri Nets
Proceedings of the 20th International Conference on Application and Theory of Petri Nets
Balancing Logic Utilization and Area Efficiency in FPGAs
FPL '00 Proceedings of the The Roadmap to Reconfigurable Computing, 10th International Workshop on Field-Programmable Logic and Applications
Bubble Partitioning for LUT-Based Sequential Circuits
FPL '01 Proceedings of the 11th International Conference on Field-Programmable Logic and Applications
High-Level Partitioning of Digital Systems Based on Dynamically Reconfigurable Devices
FPL '02 Proceedings of the Reconfigurable Computing Is Going Mainstream, 12th International Conference on Field-Programmable Logic and Applications
Implementing the MPI process topology mechanism
Proceedings of the 2002 ACM/IEEE conference on Supercomputing
A survey of very large-scale neighborhood search techniques
Discrete Applied Mathematics
Interconnect-aware high-level synthesis for low power
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Optimised state assignment for asynchronous circuit synthesis
ASYNC '95 Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies
On the hardware-software partitioning problem: System modeling and partitioning techniques
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Circuit clustering for delay minimization under area and pin constraints
EDTC '95 Proceedings of the 1995 European conference on Design and Test
Architecture driven k-way partitioning for multichip modules
EDTC '95 Proceedings of the 1995 European conference on Design and Test
When clusters meet partitions: new density-based methods for circuit decomposition
EDTC '95 Proceedings of the 1995 European conference on Design and Test
A Balanced-Mesh Clock Routing Technique Using Circuit Partitioning
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Two-way partitioning based on direction vector
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Layer assignment for yield enhancement
DFT '95 Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Modifying Min-Cut for Hardware and Software Functional Partitioning
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Performance of algorithms for initial placement
DAC '84 Proceedings of the 21st Design Automation Conference
The “PI” (placement and interconnect) system
DAC '82 Proceedings of the 19th Design Automation Conference
Heuristic cell partitioning scheme based on min-cut scheme in cellular networks
HPC-ASIA '97 Proceedings of the High-Performance Computing on the Information Superhighway, HPC-Asia '97
Hierarchical Partitioning in a Rapid Prototyping Environment
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
A new fuzzy-clustering-based approach for two-way circuit partitioning
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
Bipartitioning for Hybrid FPGA-Software Simulatio
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Multi-way partitioning of VLSI circuits
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Geometric bipartitioning problem and its applications to VLSI
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Clock-Skew Constrained Cell Placement
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Distributed Diagnostic Simulation of Stuck-At Faults in Sequential Circuits
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Resource Constrained RTL Partitioning for Synthesis of Multi-FPGA Designs
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
An Adaptive Interconnect-Length Driven Placer
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
An Efficient Multi-Level Partitioning Algorithm for VLSI Circuits
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Timing Minimization by Statistical Timing hMetis-based Partitioning
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Low Power BIST Design by Hypergraph Partitioning: Methodology and Architectures
ITC '00 Proceedings of the 2000 IEEE International Test Conference
An Evaluation of Move-Based Multi-Way Partitioning Algorithms
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Quality of EDA CAD Tools: Definitions, Metrics and Directions
ISQED '00 Proceedings of the 1st International Symposium on Quality of Electronic Design
Integration, the VLSI Journal
Implementing a genetic algorithm on a parallel custom computing machine
FCCM '95 Proceedings of the IEEE Symposium on FPGA's for Custom Computing Machines
Sourcebook of parallel computing
Further improve circuit partitioning using GBAW logic perturbation techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
An improved circuit-partitioning algorithm based on min-cut equivalence relation
Integration, the VLSI Journal
Adaptive Cluster Growth (ACG): a new algorithm for circuit packing in rectilinear region
EURO-DAC '90 Proceedings of the conference on European design automation
VLSI: placement based on routing and timing information
EURO-DAC '90 Proceedings of the conference on European design automation
A gate-matrix oriented partitioning approach for multilevel logical networks
EURO-DAC '90 Proceedings of the conference on European design automation
Datapath optimization using feedback
EURO-DAC '91 Proceedings of the conference on European design automation
Circuit partitioning for waveform relaxation
EURO-DAC '91 Proceedings of the conference on European design automation
Glue-logic partitioning for floorplans with a rectilinear datapath
EURO-DAC '91 Proceedings of the conference on European design automation
Towards optimizing global MinCut partitioning
EURO-DAC '91 Proceedings of the conference on European design automation
SHARP-looking geometric partitioning
EURO-DAC '91 Proceedings of the conference on European design automation
Partitioning a network into n pieces with a time-efficient net cost function
EURO-DAC '91 Proceedings of the conference on European design automation
LAST: a Layout Area and Shape function esTimator for high level applications
EURO-DAC '91 Proceedings of the conference on European design automation
Circuit partitioning into small sets: a tool to support testing with further applications
EURO-DAC '91 Proceedings of the conference on European design automation
Iterative compaction: an improved approach to graph and circuit bisection
EURO-DAC '91 Proceedings of the conference on European design automation
Recursive bi-partitioning of netlists for large number of partitions
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Placement Using a Localization Probability Model (LPM)
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Lock-Gain Based Graph Partitioning
Journal of Heuristics
Proceedings of the 2004 international symposium on Physical design
A study of netlist structure and placement efficiency
Proceedings of the 2004 international symposium on Physical design
Investigation of the Fitness Landscapes in Graph Bipartitioning: An Empirical Study
Journal of Heuristics
An Effective Multilevel Algorithm for Bisecting Graphs and Hypergraphs
IEEE Transactions on Computers
Leakage power minimization for the synthesis of parallel multiplier circuits
Proceedings of the 14th ACM Great Lakes symposium on VLSI
Multi-resource aware partitioning algorithms for FPGAs with heterogeneous resources
Proceedings of the 41st annual Design Automation Conference
Journal of Parallel and Distributed Computing
Proceedings of the sixteenth annual ACM symposium on Parallelism in algorithms and architectures
Evaluation of Placement Techniques for DNA Probe Array Layout
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Stable Multiway Circuit Partitioning for ECO
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
An integrated approach to timing-driven synthesis and placement of arithmetic circuits
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Solving the mesh-partitioning problem with an ant-colony algorithm
Parallel Computing - Special issue: Parallel and nature-inspired computational paradigms and applications
Efficient search space exploration for HW-SW partitioning
Proceedings of the 2nd IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
A Combined Evolutionary Search and Multilevel Optimisation Approach to Graph-Partitioning
Journal of Global Optimization
Tight integration of timing-driven synthesis and placement of parallel multiplier circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Journal of Parallel and Distributed Computing
Advanced fitness landscape analysis and the performance of memetic algorithms
Evolutionary Computation - Special issue on magnetic algorithms
Evolutionary Computation - Special issue on magnetic algorithms
Iterative-improvement-based declustering heuristics for multi-disk databases
Information Systems
Algorithmic aspects of hardware/software partitioning
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ISEGEN: Generation of High-Quality Instruction Set Extensions by Iterative Improvement
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
Integration, the VLSI Journal
ACM Transactions on Design Automation of Electronic Systems (TODAES)
New meta-heuristic for combinatorial optimization problems: intersection based scaling
Journal of Computer Science and Technology
New challanges in dynamic load balancing
Applied Numerical Mathematics - Adaptive methods for partial differential equations and large-scale computation
Proceedings of the 42nd annual Design Automation Conference
A low-level hybridization between memetic algorithm and VNS for the max-cut problem
GECCO '05 Proceedings of the 7th annual conference on Genetic and evolutionary computation
Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor
IEEE Transactions on Computers
A technique for low energy mapping and routing in network-on-chip architectures
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
Multilevel Mesh Partitioning for Optimizing Domain Shape
International Journal of High Performance Computing Applications
Factoring boolean functions using graph partitioning
Discrete Applied Mathematics - Special issue: Boolean and pseudo-boolean funtions
Fitness Landscapes, Memetic Algorithms, and Greedy Operators for Graph Bipartitioning
Evolutionary Computation
Emergent restructuring of resources in ant colonies: a swarm-based approach to partitioning
IEA/AIE'2005 Proceedings of the 18th international conference on Innovations in Applied Artificial Intelligence
Timing-driven placement based on monotone cell ordering constraints
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Electrothermal analysis and optimization techniques for nanoscale integrated circuits
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Crowdedness-balanced multilevel partitioning for uniform resource utilization
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Seeing the forest and the trees: Steiner wirelength optimization in placemen
Proceedings of the 2006 international symposium on Physical design
Net cluster: a net-reduction based clustering preprocessing algorithm
Proceedings of the 2006 international symposium on Physical design
How does partitioning matter for 3D floorplanning?
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A low complexity heuristic for design of custom network-on-chip architectures
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A first multilevel cooperative algorithm for capacitated multicommodity network design
Computers and Operations Research - Anniversary focused issue of computers & operations research on tabu search
Multi-attractor gene reordering for graph bisection
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Geometric crossover for multiway graph partitioning
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Spectral techniques for graph bisection in genetic algorithms
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
Resource Sharing Combined with Layout Effects in High-Level Synthesis
Journal of VLSI Signal Processing Systems
Using Max Cut to Enhance Rooted Trees Consistency
IEEE/ACM Transactions on Computational Biology and Bioinformatics (TCBB)
Compiled code in distributed logic simulation
Proceedings of the 38th conference on Winter simulation
Journal of Parallel and Distributed Computing
Heuristics for scheduling file-sharing tasks on heterogeneous systems with distributed repositories
Journal of Parallel and Distributed Computing
Parallel Computing - Algorithmic skeletons
Tutorial on congestion prediction
Proceedings of the 2007 international workshop on System level interconnect prediction
X-architecture placement based on effective wire models
Proceedings of the 2007 international symposium on Physical design
New theoretical results on quadratic placement
Integration, the VLSI Journal
Trunk decomposition based global routing optimization
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Multiple voltage synthesis scheme for low power design under timing and resource constraints
Integrated Computer-Aided Engineering
A hardware Memetic accelerator for VLSI circuit partitioning
Computers and Electrical Engineering
A Design-Driven Partitioning Algorithm for Distributed Verilog Simulation
Proceedings of the 21st International Workshop on Principles of Advanced and Distributed Simulation
Techniques for effective distributed physical synthesis
Proceedings of the 44th annual Design Automation Conference
Evaluation, prediction and reduction of routing congestion
Microelectronics Journal
An Improved Min-Cut Algonthm for Partitioning VLSI Networks
IEEE Transactions on Computers
A PROBE-Based Heuristic for Graph Partitioning
IEEE Transactions on Computers
Finding optimal hardware/software partitions
Formal Methods in System Design
Geometric crossovers for multiway graph partitioning
Evolutionary Computation
ACM Transactions on Embedded Computing Systems (TECS)
An algorithm for improving graph partitions
Proceedings of the nineteenth annual ACM-SIAM symposium on Discrete algorithms
A matrix-based multilevel approach to identify functional protein modules
International Journal of Bioinformatics Research and Applications
Parallel multilevel algorithms for hypergraph partitioning
Journal of Parallel and Distributed Computing
Multi-level direct K-way hypergraph partitioning with multiple constraints and fixed vertices
Journal of Parallel and Distributed Computing
Analysis of application partitioning for massively multiplayer mobile gaming
Proceedings of the 1st international conference on MOBILe Wireless MiddleWARE, Operating Systems, and Applications
Wireless sensor network aided search and rescue in trails
Proceedings of the 2nd international conference on Scalable information systems
Journal of Systems Architecture: the EUROMICRO Journal
Finding bipartition respecting natural dense clusters
ICC'05 Proceedings of the 9th International Conference on Circuits
Automatic symbolic compositional verification by learning assumptions
Formal Methods in System Design
A partitioning algorithm for block-diagonal matrices with overlap
Parallel Computing
PT-Scotch: A tool for efficient parallel graph ordering
Parallel Computing
Finding near optimal separators in planar graphs
SFCS '87 Proceedings of the 28th Annual Symposium on Foundations of Computer Science
A bivariate probabilistic model-building genetic algorithm for graph bipartitioning
Proceedings of the 10th annual conference companion on Genetic and evolutionary computation
Parallelizing CAD: a timely research agenda for EDA
Proceedings of the 45th annual Design Automation Conference
Scan chain clustering for test power reduction
Proceedings of the 45th annual Design Automation Conference
Multilevel approaches for large-scale proteomic networks
International Journal of Computer Mathematics - Bioinformatics
Scan chain organization for embedded diagnosis
Proceedings of the conference on Design, automation and test in Europe
Random stimulus generation using entropy and XOR constraints
Proceedings of the conference on Design, automation and test in Europe
A New Multi-level Algorithm Based on Particle Swarm Optimization for Bisecting Graph
ADMA '07 Proceedings of the 3rd international conference on Advanced Data Mining and Applications
A Scalable Multilevel Algorithm for Graph Clustering and Community Structure Detection
Algorithms and Models for the Web-Graph
Architecture Aware Partitioning Algorithms
ICA3PP '08 Proceedings of the 8th international conference on Algorithms and Architectures for Parallel Processing
An Enzyme-Inspired Approach to Surmount Barriers in Graph Bisection
ICCSA '08 Proceeding sof the international conference on Computational Science and Its Applications, Part I
IBERAMIA '08 Proceedings of the 11th Ibero-American conference on AI: Advances in Artificial Intelligence
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Application-specific networks-on-chip topology customization using network partitioning
IFMT '08 Proceedings of the 1st international forum on Next-generation multicore/manycore technologies
Towards a Systematic Method for Identifying Business Components
CBSE '08 Proceedings of the 11th International Symposium on Component-Based Software Engineering
Semidefinite Programming Heuristics for Surface Reconstruction Ambiguities
ECCV '08 Proceedings of the 10th European Conference on Computer Vision: Part I
Heuristic Methods for Hypertree Decomposition
MICAI '08 Proceedings of the 7th Mexican International Conference on Artificial Intelligence: Advances in Artificial Intelligence
Efficient Partitioning Strategies for Distributed Web Crawling
Information Networking. Towards Ubiquitous Networking and Services
Robustness of complex communication networks under link attacks
ICAIT '08 Proceedings of the 2008 International Conference on Advanced Infocomm Technology
A Performance-Driven Circuit Bipartitioning Method Considering Time-Multiplexed I/Os
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Configuration Sharing to Reduce Reconfiguration Overhead Using Static Partial Reconfiguration
IEICE - Transactions on Information and Systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A repartitioning hypergraph model for dynamic load balancing
Journal of Parallel and Distributed Computing
A new diffusion-based multilevel algorithm for computing graph partitions
Journal of Parallel and Distributed Computing
Local search starting from an LP solution: Fast and quite good
Journal of Experimental Algorithmics (JEA)
FPGA placement using space-filling curves: Theory meets practice
ACM Transactions on Embedded Computing Systems (TECS)
A load balancing scheme for massively multiplayer online games
Multimedia Tools and Applications
Selective Replicated Declustering for Arbitrary Queries
Euro-Par '09 Proceedings of the 15th International Euro-Par Conference on Parallel Processing
Divide-and-Conquer Strategies for Process Mining
BPM '09 Proceedings of the 7th International Conference on Business Process Management
Optimal block-tridiagonalization of matrices for coherent charge transport
Journal of Computational Physics
Combining two local search approaches to hypergraph partitioning
IJCAI'03 Proceedings of the 18th international joint conference on Artificial intelligence
Discrete cooperative particle swarm optimization for FPGA placement
Applied Soft Computing
New challenges in dynamic load balancing
Applied Numerical Mathematics - Adaptive methods for partial differential equations and large-scale computation
Graph partitioning and disturbed diffusion
Parallel Computing
Hypergraph Cuts & Unsupervised Representation for Image Segmentation
Fundamenta Informaticae
A study of routability estimation and clustering in placement
Proceedings of the 2009 International Conference on Computer-Aided Design
Partitioning of code for a massively parallel machine
Partitioning of code for a massively parallel machine
Factoring Boolean functions using graph partitioning
Discrete Applied Mathematics - Special issue: Boolean and pseudo-boolean funtions
Evolutionary algorithms for VLSI multi-objective netlist partitioning
Engineering Applications of Artificial Intelligence
An efficient heuristic for standard-cell placement
Integration, the VLSI Journal
Pervasive and Mobile Computing
Evaluating the Kernighan-Lin Heuristic for Hardware/Software Partitioning
International Journal of Applied Mathematics and Computer Science
Interactive circuit diagram visualization
CGIM '08 Proceedings of the Tenth IASTED International Conference on Computer Graphics and Imaging
Variations in FM algorithm for effective circuit partitioning
Proceedings of the International Conference and Workshop on Emerging Trends in Technology
Energy-driven distribution of signal processing applications across wireless sensor networks
ACM Transactions on Sensor Networks (TOSN)
Circuit bipartitioning using genetic algorithm
GECCO'03 Proceedings of the 2003 international conference on Genetic and evolutionary computation: PartII
Investigation of the fitness landscapes and multi-parent crossover for graph bipartitioning
GECCO'03 Proceedings of the 2003 international conference on Genetic and evolutionary computation: PartI
Improvements to the helpful-set algorithm and a new evaluation scheme for graph-partitioners
ICCSA'03 Proceedings of the 2003 international conference on Computational science and its applications: PartIII
Congestion and almost invariant sets in dynamical systems
SNSC'01 Proceedings of the 2nd international conference on Symbolic and numerical scientific computation
An effective multi-level algorithm based on ant colony optimization for bisecting graph
PAKDD'07 Proceedings of the 11th Pacific-Asia conference on Advances in knowledge discovery and data mining
Multilevel heuristic algorithm for graph partitioning
EvoWorkshops'03 Proceedings of the 2003 international conference on Applications of evolutionary computing
An effective multi-level algorithm based on simulated annealing for bisecting graph
EMMCVPR'07 Proceedings of the 6th international conference on Energy minimization methods in computer vision and pattern recognition
Optimization of parallel FDTD computations using a genetic algorithm
PPAM'07 Proceedings of the 7th international conference on Parallel processing and applied mathematics
Application of fusion-fission to the multi-way graph partitioning problem
PPAM'07 Proceedings of the 7th international conference on Parallel processing and applied mathematics
Fast approximate correlation for massive time-series data
Proceedings of the 2010 ACM SIGMOD International Conference on Management of data
Thread tailor: dynamically weaving threads together for efficient, adaptive parallel applications
Proceedings of the 37th annual international symposium on Computer architecture
On ATPG for multiple aggressor crosstalk faults
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DFT and minimum leakage pattern generation for static power reduction during test and burn-in
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Efficient querying of distributed provenance stores
Proceedings of the 19th ACM International Symposium on High Performance Distributed Computing
Spinto: high-performance energy minimization in spin glasses
Proceedings of the Conference on Design, Automation and Test in Europe
Co-design of signal, power, and thermal distribution networks for 3D ICs
Proceedings of the Conference on Design, Automation and Test in Europe
Algorithms and theory of computation handbook
ESA'10 Proceedings of the 18th annual European conference on Algorithms: Part I
An effective multilevel tabu search approach for balanced graph partitioning
Computers and Operations Research
A metaheuristic based on fusion and fission for partitioning problems
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Accelerating shape optimizing load balancing for parallel fem simulations by algebraic multigrid
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Multilevel algorithms for partitioning power-law graphs
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Parallel hypergraph partitioning for scientific computing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Scheduling of tasks with batch-shared I/O on heterogeneous systems
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
Proceedings of the 2010 Asia and South Pacific Design Automation Conference
ACISP'10 Proceedings of the 15th Australasian conference on Information security and privacy
Graph partitioning strategies for efficient BFS in shared-nothing parallel systems
WAIM'10 Proceedings of the 2010 international conference on Web-age information management
ISEGEN: an iterative improvement-based ISE generation technique for fast customization of processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Refining graph partitioning for social network clustering
WISE'10 Proceedings of the 11th international conference on Web information systems engineering
Exploration of heterogeneous FPGA architectures
International Journal of Reconfigurable Computing - Special issue on selected papers from the international workshop on reconfigurable communication-centric systems on chips (ReCoSoC' 2010)
MULTIPAR: behavioral partition for synthesizing multiprocessor architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Block-oriented programmable design with switching network interconnect
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Integrated data placement and task assignment for scientific workflows in clouds
Proceedings of the fourth international workshop on Data-intensive distributed computing
An effective web document clustering algorithm based on bisection and merge
Artificial Intelligence Review
Genetic approaches for graph partitioning: a survey
Proceedings of the 13th annual conference on Genetic and evolutionary computation
Network performance model for location area re-planning in GERAN
Computer Networks: The International Journal of Computer and Telecommunications Networking
Triangle listing in massive networks and its applications
Proceedings of the 17th ACM SIGKDD international conference on Knowledge discovery and data mining
Robust partitioning for hardware-accelerated functional verification
Proceedings of the 48th Design Automation Conference
A distributed multilevel ant-colony algorithm for the multi-way graph partitioning
International Journal of Bio-Inspired Computation
History trajectory privacy-preserving through graph partition
Proceedings of the 1st international workshop on Mobile location-based service
An automated semantic-based approach for creating tasks from Matlab Simulink models
FMICS'11 Proceedings of the 16th international conference on Formal methods for industrial critical systems
An adaptive multi-start graph partitioning algorithm for structuring cellular networks
Journal of Heuristics
Analysis of Heuristic Graph Partitioning Methods for the Assignment of Packet Control Units in GERAN
Wireless Personal Communications: An International Journal
Hypergraph Partitioning-Based Fill-Reducing Ordering for Symmetric Matrices
SIAM Journal on Scientific Computing
ISCIS'06 Proceedings of the 21st international conference on Computer and Information Sciences
What MPI could (and cannot) do for mesh-partitioning on non-homogeneous networks
EuroPVM/MPI'06 Proceedings of the 13th European PVM/MPI User's Group conference on Recent advances in parallel virtual machine and message passing interface
Multi-way clustering using super-symmetric non-negative tensor factorization
ECCV'06 Proceedings of the 9th European conference on Computer Vision - Volume Part IV
Optimization of parallel FDTD computations based on structural redeployment of macro data flow nodes
PPAM'05 Proceedings of the 6th international conference on Parallel Processing and Applied Mathematics
Computer Networks: The International Journal of Computer and Telecommunications Networking
SBV-Cut: Vertex-cut based graph partitioning using structural balance vertices
Data & Knowledge Engineering
An effective multi-level algorithm for bisecting graph
ADMA'06 Proceedings of the Second international conference on Advanced Data Mining and Applications
Projection approaches to process mining using region-based techniques
Data Mining and Knowledge Discovery
High-level synthesis with distributed controller for fast timing closure
Proceedings of the International Conference on Computer-Aided Design
Euro-Par'06 Proceedings of the 12th international conference on Parallel Processing
Scalable framework for mapping streaming applications onto multi-GPU systems
Proceedings of the 17th ACM SIGPLAN symposium on Principles and Practice of Parallel Programming
Using semi-definite programming to enhance supertree resolvability
WABI'05 Proceedings of the 5th International conference on Algorithms in Bioinformatics
Replicated partitioning for undirected hypergraphs
Journal of Parallel and Distributed Computing
KES'05 Proceedings of the 9th international conference on Knowledge-Based Intelligent Information and Engineering Systems - Volume Part IV
Learning-based symbolic assume-guarantee reasoning with automatic decomposition
ATVA'06 Proceedings of the 4th international conference on Automated Technology for Verification and Analysis
A multilevel approach to identify functional modules in a yeast protein-protein interaction network
ICCS'06 Proceedings of the 6th international conference on Computational Science - Volume Part II
ICAISC'06 Proceedings of the 8th international conference on Artificial Intelligence and Soft Computing
Treemap: an O(log n) algorithm for simultaneous localization and mapping
SC'04 Proceedings of the 4th international conference on Spatial Cognition: reasoning, Action, Interaction
Wirelength minimization in partitioning and floorplanning using evolutionary algorithms
VLSI Design - Special issue on CAD for Gigascale SoC Design and Verification Solutions
A comparison of distributed test generation techniques
VECoS'08 Proceedings of the Second international conference on Verification and Evaluation of Computer and Communication Systems
Proceedings of the 49th Annual Design Automation Conference
Performance of a genetic algorithm for the graph partitioning problem
Mathematical and Computer Modelling: An International Journal
Direct graph k-partitioning with a Kernighan-Lin like heuristic
Operations Research Letters
A tabu search approach for assigning cells to switches in cellular mobile networks
Computer Communications
Partitioning Hypergraphs in Scientific Computing Applications through Vertex Separators on Graphs
SIAM Journal on Scientific Computing
Netlist bipartitioning using particle swarm optimisation technique
International Journal of Artificial Intelligence and Soft Computing
A parallel graph partitioning algorithm to speed up the large-scale distributed graph mining
Proceedings of the 1st International Workshop on Big Data, Streams and Heterogeneous Source Mining: Algorithms, Systems, Programming Models and Applications
Review of bisonet abstraction techniques
Bisociative Knowledge Discovery
Engineering graph partitioning algorithms
SEA'12 Proceedings of the 11th international conference on Experimental Algorithms
Advanced coarsening schemes for graph partitioning
SEA'12 Proceedings of the 11th international conference on Experimental Algorithms
Efficient Entity Translation Mining: A Parallelized Graph Alignment Approach
ACM Transactions on Information Systems (TOIS)
Triangle listing in massive networks
ACM Transactions on Knowledge Discovery from Data (TKDD) - Special Issue on the Best of SIGKDD 2011
A scalable parallel force-directed graph layout algorithm
EG PGV'08 Proceedings of the 8th Eurographics conference on Parallel Graphics and Visualization
Euro-Par'07 Proceedings of the 13th international Euro-Par conference on Parallel Processing
Microprocessors & Microsystems
An effective refinement algorithm based on swarm intelligence for graph bipartitioning
ESCAPE'07 Proceedings of the First international conference on Combinatorics, Algorithms, Probabilistic and Experimental Methodologies
Max-k-Cut by the Discrete Dynamic Convexized Method
INFORMS Journal on Computing
Scalable parallel graph partitioning
SC '13 Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis
Design principles for packet parsers
ANCS '13 Proceedings of the ninth ACM/IEEE symposium on Architectures for networking and communications systems
Breakout local search for the vertex separator problem
IJCAI'13 Proceedings of the Twenty-Third international joint conference on Artificial Intelligence
Power optimization for clock network with clock gate cloning and flip-flop merging
Proceedings of the 2014 on International symposium on physical design
Placement-driven partitioning for congestion mitigation in monolithic 3D IC designs
Proceedings of the 2014 on International symposium on physical design
A high-performance triple patterning layout decomposer with balanced density
Proceedings of the International Conference on Computer-Aided Design
Incremental multiple-scan chain ordering for ECO flip-flop insertion
Proceedings of the International Conference on Computer-Aided Design
Fast and scalable parallel layout decomposition in double patterning lithography
Integration, the VLSI Journal
Critical-path-aware high-level synthesis with distributed controller for fast timing closure
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Parallelisation study of a three-dimensional environmental flow model
Computers & Geosciences
Exploiting small world property for network clustering
World Wide Web
| Hi-index | 0.06 |
An iterative mincut heuristic for partitioning networks is presented whose worst case computation time, per pass, grows linearly with the size of the network. In practice, only a very small number of passes are typically needed, leading to a fast approximation algorithm for mincut partitioning. To deal with cells of various sizes, the algorithm progresses by moving one cell at a time between the blocks of the partition while maintaining a desired balance based on the size of the blocks rather than the number of cells per block. Efficient data structures are used to avoid unnecessary searching for the best cell to move and to minimize unnecessary updating of cells affected by each move.