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DAC '92 Proceedings of the 29th ACM/IEEE Design Automation Conference
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Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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EDTC '95 Proceedings of the 1995 European conference on Design and Test
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Performance driven multi-level and multiway partitioning with retiming
Proceedings of the 37th Annual Design Automation Conference
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Proceedings of the 38th annual Design Automation Conference
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Proceedings of the 2002 international symposium on Physical design
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Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
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Proceedings of the 2003 international symposium on Physical design
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Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
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Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
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Proceedings of the 40th annual Design Automation Conference
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Proceedings of the 40th annual Design Automation Conference
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Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
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ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Multilevel full-chip gridless routing considering optical proximity correction
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Geometric crossover for multiway graph partitioning
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Geometric crossovers for multiway graph partitioning
Evolutionary Computation
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In this paper, we study the performance driven multiw ay circuit partitioning problem with consideration of the significant difference of local and global interconnect delay induced by the partitioning. We develop an efficient algorithm HPM (Hierarc hicalP erformance driven Multi-level partitioning) that simultaneously considers cutsize and delay minimization with retiming. HPM builds a multi-lev el cluster hierarc hy and performs various refinement while gradually decomposing the clusters for simultaneous cutsize and delay minimization. We provide comprehensive experimental justification for each step involv ed in HPM and in-depth analysis of cutsize and delay tradeoff existing in the performance driven partitioning problem. HPM obtains (i) 7% to 23% better delay compared to the state-of-the-art cutsize driven hMetis [11] at the expense of 19% increase in cutsize, and (ii) 81% better cutsize compared to the state-of-the-art delay driven PRIME [2] at the expense of 6% increase in delay.