Layout driven technology mapping
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Efficient network flow based min-cut balanced partitioning
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Buffer minimization and time-multiplexed I/O on dynamically reconfigurable FPGAs
FPGA '97 Proceedings of the 1997 ACM fifth international symposium on Field-programmable gate arrays
Scheduling designs into a time-multiplexed FPGA
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Partitioning sequential circuits on dynamically reconfiguable FPGAs
FPGA '98 Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays
Proud: a fast sea-of-gates placement algorithm
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Computers and Intractability: A Guide to the Theory of NP-Completeness
Computers and Intractability: A Guide to the Theory of NP-Completeness
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
Performance-Oriented Fully Routable Dynamic Architecture for a Field
Performance-Oriented Fully Routable Dynamic Architecture for a Field
Circuit partitioning for dynamically reconfigurable FPGAs
FPGA '99 Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field programmable gate arrays
Timing-driven partitioning for two-phase domino and mixed static/domino implementations
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning
ICCAD '99 Proceedings of the 1999 IEEE/ACM international conference on Computer-aided design
Temporal logic replication for dynamically reconfigurable FPGA partitioning
Proceedings of the 2002 international symposium on Physical design
Performance-driven placement for dynamically reconfigurable FPGAs
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Clustering based acyclic multi-way partitioning
Proceedings of the 13th ACM Great Lakes symposium on VLSI
Hardware-software bipartitioning for dynamically reconfigurable systems
Proceedings of the tenth international symposium on Hardware/software codesign
Nanowire-based sublithographic programmable logic arrays
FPGA '04 Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field programmable gate arrays
An optimal algorithm for minimizing run-time reconfiguration delay
ACM Transactions on Embedded Computing Systems (TECS)
A clustering- and probability-based approach for time-multiplexed FPGA partitioning
Integration, the VLSI Journal
An efficient list scheduling algorithm for time placement problem
Computers and Electrical Engineering
Temporal partitioning data flow graphs for dynamically reconfigurable computing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A minimum communication cost algorithm for dynamically reconfigurable computing system
CSS '07 Proceedings of the Fifth IASTED International Conference on Circuits, Signals and Systems
Exploiting local logic structures to optimize multi-core SoC floorplanning
Proceedings of the Conference on Design, Automation and Test in Europe
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
Combining temporal partitioning and temporal placement techniques for communication cost improvement
Advances in Engineering Software
Power minimization for dynamically reconfigurable FPGA partitioning
ACM Transactions on Embedded Computing Systems (TECS) - Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
Temporal partitioning of data flow graphs for reconfigurable architectures
International Journal of Computational Science and Engineering
Meta-algorithms for scheduling a chain of coarse-grained tasks on an array of reconfigurable FPGAs
VLSI Design - Special issue on New Algorithmic Techniques for Complex EDA Problems
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