A linear-time heuristic for improving network partitions
25 years of DAC Papers on Twenty-five years of electronic design automation
Spectral K-way ratio-cut partitioning and clustering
DAC '93 Proceedings of the 30th international Design Automation Conference
Efficient network flow based min-cut balanced partitioning
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Acyclic multi-way partitioning of Boolean networks
DAC '94 Proceedings of the 31st annual Design Automation Conference
New algorithms for min-cut replication in partitioned circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Multilevel circuit partitioning
DAC '97 Proceedings of the 34th annual Design Automation Conference
Network flow based circuit partitioning for time-multiplexed FPGAs
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Multilevel k-way hypergraph partitioning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Multi-FPGA partitioning method based on topological levelization
Journal of Electrical and Computer Engineering
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
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In this paper, we present a clustering based algorithm for acyclic multi-way partitioning. Many existing partitioning algorithms have shown that clustering can effectively improve the solution quality. However, most of them do not consider the signal direction and thus cannot maintain the acyclic property. Our algorithm is based on clustering by computing the modified fan-out free cones. Fan-out free cone clustering can reduce a graph to a smaller and sparser one, and maintain the acyclic property at the same time. Experimental results showed that our algorithm compares favorably with the previous best acyclic multi-way partitioning algorithm in cut-size.