Recent directions in netlist partitioning: a survey
Integration, the VLSI Journal
On implementation choices for iterative improvement partitioning algorithms
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
VLSI circuit partitioning by cluster-removal using iterative improvement techniques
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
Multilevel hypergraph partitioning: application in VLSI domain
DAC '97 Proceedings of the 34th annual Design Automation Conference
Multilevel circuit partitioning
DAC '97 Proceedings of the 34th annual Design Automation Conference
Partitioning around roadblocks: tackling constraints with intermediate relaxations
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Large scale circuit partitioning with loose/stable net removal and signal flow based clustering
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Partitioning-based standard-cell global placement with an exact objective
Proceedings of the 1997 international symposium on Physical design
The ISPD98 circuit benchmark suite
ISPD '98 Proceedings of the 1998 international symposium on Physical design
On multilevel circuit partitioning
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Optimal partitioners and end-case placers for standard-cell layout
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Partitioning with terminals: a “new” problem and new benchmarks
ISPD '99 Proceedings of the 1999 international symposium on Physical design
Multilevel k-way hypergraph partitioning
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Hypergraph partitioning with fixed vertices
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A linear-time heuristic for improving network partitions
DAC '82 Proceedings of the 19th Design Automation Conference
An evaluation of bipartitioning techniques
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Further improve circuit partitioning using GBAW logic perturbation techniques
Proceedings of the conference on Design, automation and test in Europe
On mismatches between incremental optimizers and instance perturbations in physical design tools
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Faster SAT and smaller BDDs via common function structure
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Local unidirectional bias for smooth cutsize-delay tradeoff in performance-driven bipartitioning
Proceedings of the 2003 international symposium on Physical design
Optimality, scalability and stability study of partitioning and placement algorithms
Proceedings of the 2003 international symposium on Physical design
Benchmarking for large-scale placement and beyond
Proceedings of the 2003 international symposium on Physical design
Combinational equivalence checking through function transformation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A System for Automatic Recording and Prediction of Design Quality Metrics
ISQED '01 Proceedings of the 2nd International Symposium on Quality Electronic Design
Further improve circuit partitioning using GBAW logic perturbation techniques
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on the 2001 international conference on computer design (ICCD)
A study of netlist structure and placement efficiency
Proceedings of the 2004 international symposium on Physical design
An Enhanced Multilevel Algorithm for Circuit Placement
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Fractional Cut: Improved Recursive Bisection Placement
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Floating-point sparse matrix-vector multiply for FPGAs
Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Capo: robust and scalable open-source min-cut floorplacer
Proceedings of the 2005 international symposium on Physical design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Guiding CNF-SAT search via efficient constraint partitioning
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Net cluster: a net-reduction based clustering preprocessing algorithm
Proceedings of the 2006 international symposium on Physical design
Design and verification of high-speed VLSI physical design
Journal of Computer Science and Technology
An effective clustering algorithm for mixed-size placement
Proceedings of the 2007 international symposium on Physical design
The coming of age of (academic) global routing
Proceedings of the 2008 international symposium on Physical design
Parallel multilevel algorithms for hypergraph partitioning
Journal of Parallel and Distributed Computing
Multi-level direct K-way hypergraph partitioning with multiple constraints and fixed vertices
Journal of Parallel and Distributed Computing
Efficient network flow based ratio-cut netlist hypergraph partitioning
ICECS'03 Proceedings of the 2nd WSEAS International Conference on Electronics, Control and Signal Processing
A pre-placement net length estimation technique for mixed-size circuits
Proceedings of the 11th international workshop on System level interconnect prediction
Layout decomposition approaches for double patterning lithography
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems - Special issue on the 2009 ACM/IEEE international symposium on networks-on-chip
Parallel hypergraph partitioning for scientific computing
IPDPS'06 Proceedings of the 20th international conference on Parallel and distributed processing
A pre-placement individual net length estimation model and an application for modern circuits
Integration, the VLSI Journal
Spatial hardware implementation for sparse graph algorithms in GraphStep
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
Parallel computation of continuous Petri nets based on hypergraph partitioning
The Journal of Supercomputing
Artificial bee colony for the standard cell placement problem
International Journal of Metaheuristics
Rent's rule based FPGA packing for routability optimization
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
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