IEEE DATC Newsletter on Design Automation
Executable workflows: a paradigm for collaborative design on the Internet
DAC '97 Proceedings of the 34th annual Design Automation Conference
Modeling design tasks and tools: the link between product and flow model
DAC '97 Proceedings of the 34th annual Design Automation Conference
Framework encapsulations: a new approach to CAD tool interoperability
DAC '98 Proceedings of the 35th annual Design Automation Conference
A geographically distributed framework for embedded system design and validation
DAC '98 Proceedings of the 35th annual Design Automation Conference
WELD—an environment for Web-based electronic design
DAC '98 Proceedings of the 35th annual Design Automation Conference
Virtual simulation of distributed IP-based designs
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
METRICS: a system architecture for design process optimization
Proceedings of the 37th Annual Design Automation Conference
Improved algorithms for hypergraph bipartitioning
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
A universal client for distributed networked design and computing
Proceedings of the 38th annual Design Automation Conference
The state of the art in locally distributed Web-server systems
ACM Computing Surveys (CSUR)
Toward CAD-IP Reuse: A Web Bookshelf of Fundamental Algorithms
IEEE Design & Test
Grids and grid technologies for wide-area distributed computing
Software—Practice & Experience
Internet-Based Collaborative Test Generation with MOSCITO
Proceedings of the conference on Design, automation and test in Europe
Routability-driven placement and white space allocation
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Improving host security with system call policies
SSYM'03 Proceedings of the 12th conference on USENIX Security Symposium - Volume 12
LADDIS: the next generation in NFS file server benchmarking
Usenix-stc'93 Proceedings of the USENIX Summer 1993 Technical Conference on Summer technical conference - Volume 1
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As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New-generation EDA tools must work correctly on a wider range of inputs, have more internal states, take more effort to develop, and offer fertile ground for programming mistakes. Ensuring quality of a commercial tool in realistic design flows requires rigorous simulation, non-trivial computational resources, accurate reporting of results and insightful analysis. However, time-to-market pressures encourage EDA engineers and chip designers to look elsewhere. Thus, the recent availability of cheap Linux clusters and grids shifts the bottleneck from hardware to logistical tasks, i.e., the speedy collection, reporting and analysis of empirical results. To be practically feasible, such tasks must be automated; they leverage high-performance computing to improve EDA tools. In this work we outline a possible infrastructure solution, called bX, explore relevant use models and describe our computational experience. In a specific application, we use bX to automatically build Pareto curves required for accurate performance analysis of randomized algorithms.